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b210-k7

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• fba65c68f7 image builder: Allow missing connections Martin Braun 2024-06-26 13:37:08 +02:00
• d696c160db fpga: rfnoc: Harmonize x410_X4_400_rfnoc_image_core.yml Martin Braun 2024-06-18 11:15:24 +02:00
• 712142efdb fpga: sim: Initialize test_status Wade Fife 2024-06-13 14:27:32 -05:00
• 1451ae066b fpga/usrp3: Fix DC truncation bias by adding rounding to DDC chain. Ryan Volz 2023-09-21 14:56:39 -04:00
• 523212fa04 image builder: Add --build-ip-dir option Martin BraunandWade Fife 2024-05-06 11:20:56 +02:00
• 0e6459250b fpga: tools: Force write when saving Vivado project file Wade Fife 2024-04-25 13:53:53 -05:00
• 8685870bf4 fpga: tools: Add --fpga-dir to repeat_fpga_build Wade Fife 2024-04-11 23:06:24 -05:00
• 8d0cc11269 ci: Update FPGA CI pipelines to match new image builder Martin Braun 2024-04-05 08:26:32 +02:00
• 6ef3795e42 fpga: Align build process for all targets Martin Braun 2024-04-05 16:34:45 +02:00
• ba5e431c5c fpga/mpm: x4xx: Add device DNA read capability Martin Braun 2023-10-19 12:02:22 +02:00
• d006250dc1 fpga: x400: Add PPS interface to X410/X440 BSP Jonathon PendlumandMartin Braun 2024-01-02 13:21:56 -05:00
• 6b3d10ad31 x300: Add support for reading device DNA Martin Braun 2024-02-21 16:37:00 +01:00
• 6d89320721 fpga: x400: Add netlist make flow Javier Valenzuela 2023-12-04 13:59:49 +00:00
• 69e728dba0 fpga: Add passthru CHDR/DMA transport adapter module Martin Braun 2023-12-18 15:12:36 +01:00
• 872de917bf fpga: x4xx: Replace Ethernet transport adapter Wade Fife 2023-12-13 09:39:47 -06:00
• 8669c68048 utils: image builder: Major update 3 people 2023-11-24 11:12:21 +01:00
• 77d07a9714 fpga/rfnoc: Add license checker block Martin Braun 2023-10-27 09:45:39 +02:00
• cc28ffff60 fpga: Add license checker module Martin Braun 2023-10-23 17:21:51 +02:00
• cf85a6d40c fpga: Add cores for SHA256 Martin Braun 2023-10-23 11:25:13 +02:00
• 8af1711952 fpga: rfnoc: Enable blocks with no inputs/outputs Martin Braun 2023-10-26 14:24:05 +02:00
• 76f67bbb0c fpga: Add module for reading Xilinx device DNA Martin Braun 2023-10-16 17:31:53 +02:00
• 75a2526efd fpga: x400: zbx: Set Locale for ZBX Lattice build Max Köhler 2024-05-21 14:15:28 +02:00
• 10f0bc2e79 fpga: tools: Fix VHDL and Verilog types in modify_bdtcl Max Köhler 2024-05-17 13:20:33 +02:00
• 894e5aa9a4 fpga: sim: Fix cast in PkgRandom Wade Fife 2024-05-13 18:24:51 -05:00
• 70ab61e202 fpga: sim: Fix test_status indices in PkgTestExec Wade Fife 2024-05-14 14:58:16 -05:00
• c719cf1406 fpga: rfnoc: reverse FIR filter coefficients to get embedded in DSPE48 Max Köhler 2024-03-18 11:53:38 +01:00
• fa95da3f7f fpga: x400: Place SPI into IOB on X440 Max Köhler 2024-04-05 11:04:48 +00:00
• 1a4d0543f6 fpga: tools: Fix VIVADO_PROJECT variable Wade Fife 2024-04-01 09:28:14 -05:00
• 822d1bd26d fpga: Add option to specify build output directory Wade Fife 2024-03-11 08:44:58 -05:00
• 600df8752c fpga: Add option to build IP only Wade Fife 2024-03-06 15:53:34 -06:00
• a82a2d122e fpga: Add Vivado project option to USRP FPGA builds Wade Fife 2024-03-06 11:28:05 -06:00
• 51865aa003 fpga: tools: Add option to save Vivado project Wade Fife 2024-03-06 11:27:18 -06:00
• 5c23c71e44 fpga: utils: Use default image core name Wade Fife 2024-03-14 22:44:52 -05:00
• fc35c2a66a fpga: n3xx: Rename BIST image cores Wade Fife 2024-03-14 17:53:32 -05:00
• 9b6fc5d501 fpga: Add incremental to strategies for e3xx, n3xx, x3xx Wade Fife 2024-03-14 11:44:56 -05:00
• 629266db08 fpga: Update x3xx/e3xx RFNoC image core files Javier Valenzuela 2024-03-07 18:03:09 +00:00
• a8937b3500 fpga: tools: Fix -quiet in modify_bdtcl Max Köhler 2024-03-13 10:22:08 +01:00
• 2e0177484c fpga: rfnoc: Add EOB to source port of null_src_sink block Francisco Salomon 2022-11-25 15:51:31 +00:00
• e9700b2081 fpga: x4xx: add option for incremental Vivado build Max Köhler 2024-03-01 12:25:03 +00:00
• 275373c06b fpga: tools: viv_ip_utils to update hdl_sources.tcl Max Köhler 2024-03-06 15:13:02 +01:00
• 7be838b24c fpga: x400: zbx: Improve Lattice make flow Max Köhler 2024-03-05 11:31:15 +01:00
• e2c442ab8c fpga: Update tooling to use image builder instead of make Martin Braun 2024-02-09 18:48:09 +01:00
• ea7c48ad38 n3xx: Add comments on clock_source=external,time_source=gpsdo David Raeman 2022-02-21 15:11:32 +00:00
• f4e2c89e4c fpga: utils: Add update_image_cores.sh Martin Braun 2023-11-29 12:47:25 +01:00
• 9a8e484332 fpga: x400: Update PS DRAM speed bin Wade Fife 2023-09-12 16:21:35 -05:00
• 44d1ecb8b2 fpga: x300: Remove irrelevant critical warning Martin Braun 2023-12-19 15:21:31 +01:00
• df0b86f432 fpga: x300: sfpp: Fix warning about duplicate reg Martin Braun 2023-12-19 10:20:39 +01:00
• 27b06f86fb fpga: tools: Spruce up launch_vivado.py Martin Braun 2023-12-13 11:46:12 +01:00
• 7a00849c02 fpga: Add more spurious files to gitignore Martin Braun 2023-10-25 12:21:47 +02:00
• 90e094b614 fpga: x410: Add dev_config.json Martin Braun 2023-12-13 09:03:52 +01:00
• c98c7ab88d fpga: Remove dupes from DESIGN_SRCS Martin Braun 2023-12-12 14:55:39 +01:00
• ce0ddc6dac fpga: Replace references to python -> python3 Martin Braun 2023-12-04 11:09:48 +01:00
• e44fe8625b fpga: lib: Add default wiretypes to synchronizer Martin Braun 2023-10-27 12:03:46 +02:00
• 23220e0737 fpga: x400: add default declaration for DRAM_BANKS Javier Valenzuela 2023-11-07 12:26:33 -06:00
• d05b79a8aa fpga: x400: rfdc timing cleanup Javier Valenzuela 2023-11-02 16:00:01 -05:00
• 03f9ee6f52 fpga: x400: Add clock IDs to X440 200 MHz image Wade Fife 2023-11-02 13:19:28 -05:00
• 2f83ebb435 fpga: x400: bump minor revision Javier Valenzuela 2023-10-24 11:41:55 -05:00
• ddbff804ed fpga: x400: update signals to run on two domains Javier Valenzuela 2023-10-24 07:02:51 -05:00
• e67c1f9ed4 fpga: x400: Split DRAM interface on X440_X4_200 Wade Fife 2023-10-25 12:34:52 -05:00
• 02f2a821f9 fpga: tools: Add X440_X4_200 to X440 package Wade Fife 2023-10-23 14:00:31 -05:00
• e87c82cc74 fpga: x400: Split DRAM interface into two banks Wade Fife 2023-10-19 19:01:15 -05:00
• 2c5a2f5974 x4xx: Add support for auto clock ID Martin Braun 2023-10-18 14:25:26 +02:00
• dbabc04cd9 fpga: x400: Add X440 200 MHz variant Wade Fife 2023-09-25 22:00:49 -05:00
• ea0b8f4012 fpga: x400: Add CE clock Wade Fife 2023-10-11 17:17:04 -05:00
• 2612487d43 fpga: n3xx: Add CE clock Wade Fife 2023-10-11 16:42:01 -05:00
• e4d9a9a448 fpga: lib: Allow buffering in eth_ipv4_chdr_adapter Wade Fife 2023-10-11 13:15:42 -05:00
• 613444b39b fpga: rfnoc: radio: Add clock index parameters Martin Braun 2023-10-06 12:21:44 +02:00
• e016ef0343 fpga: rfnoc: Add clock info to backend ifc Martin Braun 2023-10-06 12:28:16 +02:00
• ccfb94c062 fpga: x400: propagate pps_sync changes Javier Valenzuela 2023-09-22 17:09:44 -05:00
• 4d38451f2a fpga: x400: pps_sync cleanup Javier Valenzuela 2023-09-19 13:05:19 -05:00
• 4e26d6946f fpga: x440: remove extra synchronizer Javier Valenzuela 2023-05-10 07:01:42 -05:00
• c5a4ea2f0e fpga: x400: Update PL DRAM speed bin Wade Fife 2023-09-12 16:22:56 -05:00
• 72c3a524c7 fpga: x440: cpld: led control cleanup Javier Valenzuela 2023-08-07 20:13:52 -05:00
• b4c2aa0a40 fpga: x400: Fix SPI trigger clock crossing Mark Eid 2023-07-18 16:42:46 -05:00
• 88dd427a98 fpga: Fix RFNoC OOT Makefile inclusion Wade Fife 2023-07-19 16:48:35 -05:00
• a1058ba2e7 fpga: x440: fbx: clean up I2C triggers Javier Valenzuela 2023-07-18 17:13:40 -05:00
• 1b9a79381a fpga: x400: Fix PRC divider register map Mark Eid 2023-06-29 15:56:35 -05:00
• cde17c060f fpga: x400: Add X440 to default make targets Wade Fife 2023-06-13 19:48:33 -05:00
• 3e55a7f988 fpga: x400: Fix DB1 timekeeper strobe Javier Valenzuela 2023-06-15 08:54:10 -05:00
• 5cadf901c7 fpga: Add X440/FBX support 4 people 2023-05-24 11:22:41 +02:00
• a405111ce7 fpga: x400: sim: Add 10 GbE with wide CHDR Wade Fife 2023-06-10 15:55:18 -05:00
• 564944ea93 fpga: lib: Fix IPv4 CHDR TUSER width Wade Fife 2023-06-10 15:54:23 -05:00
• 9ed8bb22d6 fpga: lib: Fix Vivado warnings Wade Fife 2023-06-07 22:59:57 -05:00
• 0817f084a3 fpga: lib: Add ctrl_port_to_wb_i2c module Ryan Marlow 2023-05-24 17:00:46 +02:00
• adf6f576c6 mpm/fpga: x4xx: Major updates in preparation for future devices 5 people 2023-05-15 14:51:43 +02:00
• ffdcc016cc fpga: x4xx: Refactor MB CPLD code for future devices Javier Valenzuela 2023-05-15 14:25:32 +02:00
• e9a6fe4e2e FPGA: Synchronize X300 RX frontends on time change michael-west 2023-05-02 11:41:59 -07:00
• d6bcab7c8c FPGA: Add time changed pulse to timekeeper michael-west 2023-05-02 11:38:57 -07:00
• e49258d910 fpga: x4xx: Rename x410 -> x4xx for common DTS files Martin Braun 2023-04-24 14:51:07 +02:00
• 0971ae69cb Replay buffered TX streamer: Fix gaps in TX michael-west 2023-03-27 17:01:09 -07:00
• a90444c784 fpga: lib: Add clock_div module Ryan Marlow 2023-04-05 12:27:54 +02:00
• cd3b980e25 fpga: x400: Set QSFP LEDs on startup Wade Fife 2023-03-21 15:38:21 -05:00
• 8cbcc508c5 fpga: rfnoc: Add throttle to stream endpoints Wade Fife 2023-01-31 21:35:37 -06:00
• 6ce656af87 fpga: lib: Add axis_pkt_throttle.sv Wade Fife 2023-01-24 16:07:35 -06:00
• 880f7b139b fpga: x400: Add X4C_200 RFNoC image cores Wade Fife 2023-02-26 14:50:06 -06:00
• abe4a63973 fpga: x400: Add CG_200 RFNoC image cores Wade Fife 2023-02-25 21:36:12 -06:00
• a08d0c4bd5 fpga: tools: Add X410_UC_200 image to X410 package Wade Fife 2023-02-21 11:06:49 -06:00
• aeaf219f77 fpga: Update all RFNoC image core files Wade Fife 2023-02-13 16:49:38 -06:00
• fae19151c4 fpga: x400: Add support for X4C, C1, and UC variants Wade Fife 2023-01-05 17:48:59 -06:00
• 0e65ae3c86 fpga: x400: Add 1x64, 2x64, and 1x128 DRAM interconnect Wade Fife 2023-01-04 09:47:19 -06:00