fpga: Replace references to python -> python3

In several cases, we call `python` explicitly. On many modern operating
systems (e.g., Ubuntu 22.04), this command no longer exists, and if it
does, it's often an alias to python3.

Because the python3 executable has been around for so long, simply
using that directly (instead of, e.g., autodetecting the OS preferences)
is a simple fix that immediately allows building bitfiles, e.g. for the
B2xx series, on more recent OSes.


Original-commit: 356cd172bb5ae0d043825bd1f4dffbd6646ec3d2

build.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 #
 # Copyright 2016 Ettus Research LLC
 #

lib/io_port2/create-lvbitx.py

@@ -1,4 +1,4 @@
-#!/usr/bin/python
+#!/usr/bin/python3
 """
 Generate lvbitx from template and bitfile
 """

tools/utils/package_images.py

@@ -40,7 +40,7 @@ def parse_args():
     even) information will be lacking. The suggested usage is to invoke the following command from
     the directory containing the image files
 
-    `python package_images.py --manifest /path/to/manifest --githash <REPO>-<GITHASH>`
+    `python3 package_images.py --manifest /path/to/manifest --githash <REPO>-<GITHASH>`
 
     where REPO is the repository used to create the images  (ie 'fpga'), and GITHASH is the Git
     hash of that repository used to create the images. When in doubt, please check with previous

tools/utils/rfnoc-system-sim/rfnocsim.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 #
 # Copyright 2016 Ettus Research
 #

top/Makefile.common

@@ -1,6 +1,7 @@
 #
 # Copyright 2008-2013 Ettus Research LLC
 #
+# Used by b200 and b2xxmini
 
 ##################################################
 # Constants
@@ -13,8 +14,8 @@ else
 endif
 BASE_DIR = $(abspath ..)
 ISE_HELPER = xtclsh $(BASE_DIR)/tcl/ise_helper.tcl
-SANITY_CHECKER = python $(BASE_DIR)/python/check_inout.py
-TIMING_CHECKER = python $(BASE_DIR)/python/check_timing.py
+SANITY_CHECKER = python3 $(BASE_DIR)/python/check_inout.py
+TIMING_CHECKER = python3 $(BASE_DIR)/python/check_timing.py
 ISE_FILE = $(BUILD_DIR)/$(TOP_MODULE).$(ISE_EXT)
 BIN_FILE = $(BUILD_DIR)/$(TOP_MODULE).bin
 BIT_FILE = $(BUILD_DIR)/$(TOP_MODULE).bit

top/python/check_inout.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 #
 # Copyright 2010 Ettus Research LLC
 #

top/python/check_timing.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 #
 # Copyright 2011-2012 Ettus Research LLC
 #

top/x300/Makefile

@@ -19,7 +19,7 @@
 # Uncomment the following line to add a debug UART on GPIO 10 & 11
 #OPTIONS += DEBUG_UART=1
 
-CREATE_LVBITX=python ../../lib/io_port2/create-lvbitx.py
+CREATE_LVBITX=python3 ../../lib/io_port2/create-lvbitx.py
 
 # Base output directory for all builds
 BUILD_BASE_DIR ?= .