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b210-k7

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• b5230b0256 fpga: tools: Support new FPGA types in viv_simulator.mak Wade Fife 2021-06-03 12:58:37 -05:00
• 81e8b63fb9 fpga: tools: Fix python2 reference in viv_ip_builder.mak Wade Fife 2021-06-03 12:57:16 -05:00
• 99a4250c0b fpga: tools: Add modelsim.excludes Wade Fife 2021-06-10 11:50:04 -05:00
• 4baf8139c8 fpga: tools: Add modelsim.ini to ModelSim calls Wade Fife 2021-06-09 13:29:10 -05:00
• 1586d6c730 fpga: tools: Add features to run_testbenches.py Wade Fife 2021-06-10 11:49:27 -05:00
• 69a7abba4d fpga: tools: Add ip target to simulation makefiles Wade Fife 2021-06-09 10:09:22 -05:00
• fd8c814f6f fpga: tools: Add X410 support for image packaging Humberto Jimenez 2021-05-27 17:47:31 -05:00
• a1d7c252c2 fpga: x400: zbx: Add support for ZBX CPLD 5 people 2021-02-05 13:15:02 -06:00
• 7e59e9516d fpga: x400: cpld: Add support for X410 motherboard CPLD 3 people 2021-02-05 13:14:41 -06:00
• 61782b02d7 fpga: x400: Add support for X410 motherboard FPGA 10 people 2021-06-08 19:40:46 -05:00
• bfef20ea45 fpga: sim: Add slave_idle() to PkgAxiStreamBfm.sv Wade Fife 2021-06-08 19:42:34 -05:00
• a760762db3 fpga: lib: Update register comments in eth_regs.vh Wade Fife 2021-06-08 19:42:05 -05:00
• 43e32abd11 fpga: Update rfnoc_image_core for all targets Wade Fife 2021-04-22 14:49:57 -05:00
• 235703e806 fpga: tools: Fix part selection in setupenv Sam O'Brien 2021-06-09 09:28:22 -05:00
• 3b1d62928d fpga: Change RFNoC YAML version numbers to strings Wade Fife 2021-04-22 11:21:34 -05:00
• 4188b6ccbc fpga: lib: Add modports to SV AXI-Stream blocks Wade Fife 2021-04-16 15:02:24 -05:00
• d6ca4f01fc fpga: lib: Add time_increment port to timekeeper Wade Fife 2021-03-10 14:17:41 -06:00
• 3bc803026b fpga: lib: Pipeline ctrlport_timer Wade Fife 2021-03-09 15:38:58 -06:00
• ab09eb9b09 fpga: lib: Add clock domain comments to interfaces Wade Fife 2021-03-02 10:25:57 -06:00
• b7bd308e9c fpga: lib: Add 2 to 1 gearbox module Wade Fife 2021-02-13 16:45:43 -06:00
• 7fda8365de fpga: lib: Add PHASE parameter to sim_clk_gen Wade Fife 2021-02-15 17:13:42 -06:00
• 8cb9bdd331 fpga: lib: Add AXI4 (full) interface Andrew Moch 2021-01-29 17:58:12 +00:00
• d7acf31a38 fpga: lib: add pause support to ethernet xport Andrew Moch 2021-02-05 10:48:24 -06:00
• feb849051f fpga: lib: Add eth_ipv4_internal Wade Fife 2020-10-15 18:13:45 -05:00
• 44d37a616f fpga: lib: Add zynquplus family to axi_bitq Humberto Jimenez 2019-11-19 09:11:14 -06:00
• d6397f8f5e fpga: tools: Add ability to run commands before route Wade Fife 2021-06-02 14:00:27 -05:00
• cfb4ba7f0b fpga: tools: Add ability to patch IP during generation Wade Fife 2020-05-27 19:46:02 -05:00
• ad6b7bdee8 fpga: tools: Add support for RFSoC Humberto Jimenez 2018-12-13 16:35:50 -06:00
• 7ec0561c4d fpga: lib: Minor cleanup of axi_lite.vh Lars Amsel 2021-04-19 09:56:55 +02:00
• 40c76b8d9a fpga: rfnoc: Add ability to disable output flow control Wade Fife 2021-03-31 14:03:48 -05:00
• bababc79eb fpga: lib: Add rx_front_end_gen3 testbench Wade Fife 2021-04-05 18:26:27 -05:00
• 776860727e fpga: lib: Update round_sd to eliminate X from simulation Wade Fife 2021-04-05 18:27:31 -05:00
• a300408721 fpga: lib: Fix simulation of axi_fir_filter Wade Fife 2021-04-05 16:02:45 -05:00
• 4fa8a41e0b TwinRX: Remove frontend filter michael-west 2020-07-20 10:15:12 -07:00
• dabe25774f fpga: docs: Improve documentation of rx_frontend_gen3 Martin Braun 2021-03-17 16:08:05 +01:00
• c0b05cc4e4 fpga: lib: Fix DDS_SIN_COS_LUT outputs in makefile Paul Butler 2021-03-24 15:59:52 +01:00
• 781636013c fpga: dsp: Fix formatting of rx_dcoffset and add docs Martin Braun 2021-03-08 10:42:34 +01:00
• ec4fab0340 fpga: Remove Python2 support from build system Martin Braun 2020-12-01 18:50:12 +01:00
• ba66b26dc5 fpga: e320: Improve timing on LVDS interface Wade Fife 2020-10-13 16:52:34 -05:00
• 8eb950ac45 fpga: lib: add glitch free mux module Max Köhler 2020-11-24 16:08:48 +01:00
• e9a85d09ae fpga: e31x: Add OOT sources to Makefile.e31x.inc Wade Fife 2020-11-12 13:37:20 -06:00
• cc5c306897 fpga: lib: Fix axis_strm_monitor parameters Wade Fife 2020-10-13 14:11:20 -05:00
• e41c34776c fpga: lib: Fix small packets stuck in 10 GbE TX Andrew Moch 2020-10-02 23:41:59 +01:00
• 56d114b508 fpga: lib: Fix 10 GbE cut-through mode Andrew Moch 2020-09-16 17:20:05 +01:00
• 42d17bd090 fpga: lib: add generic to disable bitq engine tri-stating Max Köhler 2020-09-11 11:47:07 +02:00
• f1d3374e50 fpga: e31x: Change image file to e310_rfnoc_image_core Wade Fife 2020-09-08 10:48:52 -05:00
• bb7e7023e6 E320: Revert addition of Replay block michael-west 2020-09-04 15:32:12 -07:00
• 281efa74f1 fpga: Added AA image mappings to N320 Aaron Rossetto 2020-09-03 15:27:04 -05:00
• 52172aaaf3 fpga: Add Replay Block to RFNoC Core Image mattprost 2020-08-06 13:59:58 -05:00
• eab91d8ed0 fpga: Update DRAM IO signatures Wade Fife 2020-09-02 07:51:40 -05:00
• d6849765ec fpga: sim: chdr_stream_endpoint_tb improvements Wade Fife 2020-08-24 21:32:20 -05:00
• 15d9d740ef fpga: sim: Fix stream command and status models Wade Fife 2020-08-24 21:31:18 -05:00
• bd5d539bc2 fpga: n3xx: Update AXI interconnect address range Wade Fife 2020-08-26 13:51:51 -05:00
• 7e3f04d0ab fpga: e320: Update AXI interconnect address range Wade Fife 2020-08-26 13:50:06 -05:00
• cf524e9af5 fpga: rfnoc: Update CHDR stream INIT command Wade Fife 2020-08-24 21:33:19 -05:00
• 0c6f2627a5 fpga: lib: Fix lint warnings Wade Fife 2020-08-24 21:29:28 -05:00
• 09461da1f5 fpga: rfnoc: Remove deprecated files Wade Fife 2020-08-20 12:22:13 -05:00
• 28955fb9f4 fpga: e31x: Change RFNoC Ctrl clock to 40 MHz Wade Fife 2020-08-18 12:02:44 -05:00
• fd113147be fpga: e320: Fix timeout for timekeeper registers Wade Fife 2020-08-18 10:03:30 -05:00
• 2253f7dbb0 fpga: n3xx: Fix timeout for timekeeper registers Wade Fife 2020-08-17 21:07:30 -05:00
• f1380e5f33 fpga: e31x: Fix timeout for timekeeper registers Wade Fife 2020-08-17 12:43:12 -05:00
• 845dfd4f87 fpga: lib: Add more CtrlPort constants Wade Fife 2020-08-18 10:01:47 -05:00
• 066948f87d fpga: lib: Add ctrlport_to_regport bridge Wade Fife 2020-08-17 21:06:43 -05:00
• 324f9d3c9a fpga: e320: Fix default YAML target to E320_1G Martin Braun 2020-08-14 10:20:55 +02:00
• 20b814f62c fpga: e310: Fix device in image core YAML Wade Fife 2020-08-14 11:34:10 -05:00
• b0c8336087 fpga: rfnoc: Enable clean switch in Switchboard Wade Fife 2020-08-12 14:58:50 -05:00
• 5a99bed5ee fpga: lib: Fix SWITCH_ON_LAST in axi_mux_select Wade Fife 2020-08-12 14:57:49 -05:00
• ec70691e84 fpga: lib: add handshake to replace FIFO for ctrlport CDC Max Köhler 2020-08-10 23:19:29 +02:00
• c91315d857 n320: Double radio ingress buffer size mattprost 2020-08-10 17:36:09 -05:00
• 8ed69c7cdb fpga: rfnoc: Fix clock crossing in axis_data_to_chdr Wade Fife 2020-08-10 17:24:07 -05:00
• 524ac02aaf fpga: lib: Change max FFT size to 1024 Wade Fife 2020-08-10 09:31:26 -05:00
• b4ea61f129 fpga: rfnoc: Add tests to FFT block Wade Fife 2020-07-31 16:09:07 -05:00
• 06afe79a42 fpga: lib: add Intel MAX10 architecture for 2clk FIFO Max Köhler 2020-08-04 13:19:10 +02:00
• f28357679e fpga: lib: Update xport_sv Andrew Moch 2020-07-29 19:17:49 +01:00
• 466e61d3ef fpga: rfnoc: Add RFNoC Keep One in N block Aaron Rossetto 2020-08-05 07:32:20 -05:00
• 104a73e623 fpga: rfnoc: Add RFNoC Replay block Wade Fife 2020-04-06 16:19:50 -05:00
• b4fed123c8 fpga: rfnoc: Add 4 KiB boundary check to sim_axi_ram Wade Fife 2020-04-15 21:05:15 -05:00
• 59f5dcfc4f fpga: rfnoc: Add support for CHDR_W < ITEM_W*NIPC Wade Fife 2020-04-12 17:13:22 -05:00
• 7834312db6 fpga: lib: Fix comments and indentation in axi_fifo_short.v Wade Fife 2020-04-15 20:50:19 -05:00
• 3bbc81bb44 fpga: n320: Add BIST (AA) image files steviez 2020-07-31 12:08:19 -05:00
• 439c2af5e2 fpga: lib: Add xge features for new xport_sv Andrew Moch 2020-07-29 19:26:40 +01:00
• d5bbce58cb fpga: sim: Update PkgEthernet Andrew Moch 2020-07-30 22:57:25 +01:00
• 02e4ef3318 fpga: sim: Fix AxiLiteBfm Andrew Moch 2020-07-30 22:51:24 +01:00
• 6606757fa7 fpga: lib: Update AxiLiteIf Andrew Moch 2020-07-29 17:57:13 +01:00
• 4313178af4 fpga: lib: Fix chdr_mgmt_pkt_handler when CHDR_W != 64 Andrew Moch 2020-07-29 17:59:25 +01:00
• 77cadca8a9 fpga: tools: RESOLVE_PATH checks for an empty path Andrew Moch 2020-07-29 16:07:10 +01:00
• 2eb71626fb fpga: rfnoc: Add Signal Generator RFNoC block Wade Fife 2020-06-19 15:40:12 -05:00
• 3e1e0be3bc fpga: lib: Add axis_packetize module Wade Fife 2020-06-25 00:24:25 -05:00
• 0c67c21d6c fpga: Add Switchboard RFNoC block Jesse Zhang 2020-07-24 00:08:18 -05:00
• 84a9230183 fpga, mpm: Bump FPGA compat number RobertWalstab 2020-07-24 16:31:45 +02:00
• 4c7ee1eb8e TwinRX: Fix increased noise floor michael-west 2020-07-13 11:05:15 -07:00
• 6dfa273771 fpga: remove liberio RobertWalstab 2020-07-14 10:32:26 +02:00
• dce6ce8063 fpga: rfnoc: Fix testbenches to run under ModelSim Wade Fife 2020-07-02 13:50:23 -05:00
• 2f517134cd fpga: e31x: Add gitignore file Martin Braun 2020-07-17 14:33:07 +02:00
• b923e1bb2c e31x: Minor cleanup on top-level e31x.v module Martin Braun 2020-07-17 14:31:53 +02:00
• 8ad22c51e3 e31x: Swap out liberio for internal ethernet in the idle image RobertWalstab 2020-07-17 16:08:51 +02:00
• 51841521f8 e31x: fpga: connect device_id RobertWalstab 2020-07-17 13:06:31 +02:00
• d2febe93a8 fpga: rfnoc: Add RFNoC Moving Average block Wade Fife 2020-06-18 09:55:58 -05:00
• 0ab98653b2 n32x: Swap out liberio for internal Ethernet RobertWalstab 2020-07-09 13:32:07 +02:00
• b196be8d42 n3xx: Swap out liberio for internal Ethernet RobertWalstab 2020-06-10 16:27:32 +02:00