Commit Graph
13 Commits
Author SHA1 Message Date
Wade Fife 0770fd4405 fpga: lib: Add axis_sideband_tuser
Original-commit: 1549f95dc5c06d006499c30560184338c17a389e
2024-12-17 22:13:42 +01:00
Wade Fife 8f64fb2ee8 fpga: lib: Add axis_split_bus
Original-commit: f2a9c389d35697bd2e98fb05ffe3c66dcb179e65
2024-12-17 22:13:42 +01:00
Wade Fife d95d0252e0 fpga: lib: Add axis_combine
Original-commit: ab19d99cb0b4b74327bc31ecb5bc27ffcf94dec0
2024-12-17 22:13:42 +01:00
Wade Fife 06c18110ce fpga: lib: Add axis_data_if_packetize
Original-commit: ec91debff5c29d5e0fe92bc40ec553e4d4294a69
2024-12-17 22:13:42 +01:00
Wade Fife 9ed8bb22d6 fpga: lib: Fix Vivado warnings
Original-commit: ad3d614426e068a067692df411412ce3ed936c39
2023-06-09 09:01:04 -05:00
Wade Fife 6ce656af87 fpga: lib: Add axis_pkt_throttle.sv
Original-commit: f8f93ced23cf3ce0a3ba4339e7fa4ab0c598654d
2023-03-13 17:51:17 -04:00
Wade Fife 104a73e623 fpga: rfnoc: Add RFNoC Replay block
Original-commit: 6d92a1828121ca4b57d496bbf522820f961244b9
2020-08-04 15:40:08 -05:00
Wade Fife 2eb71626fb fpga: rfnoc: Add Signal Generator RFNoC block
Original-commit: 1e94f85b8bafc3f9acab7ef35d2675fa7e61f6f4
2020-07-30 12:51:41 -05:00
Wade Fife 3e1e0be3bc fpga: lib: Add axis_packetize module
This module takes an AXI-Stream without TLAST and outputs the
same AXI-Stream with TLAST based on the provided packet size
input.


Original-commit: b0b3849a18e1f2d3cb255a507b01ac5e7a9416a0
2020-07-30 12:51:41 -05:00
Wade Fife b566c415a1 fpga: lib: Add AXI-Stream splitter (axis_split)
The axis_split module takes a single AXI-Stream input and duplicates it
onto multiple AXI-Stream outputs. This block correctly handles the
somewhat tricky flow-control logic so that the AXI-Stream handshake
protocol is honored at all top-level ports.


Original-commit: fa0f4b2833119d57d331f592028ff9f032895c89
2020-04-14 16:37:43 -05:00
+18 6b67702ad7 Merge FPGA repository back into UHD repository
The FPGA codebase was removed from the UHD repository in 2014 to reduce
the size of the repository. However, over the last half-decade, the
split between the repositories has proven more burdensome than it has
been helpful. By merging the FPGA code back, it will be possible to
create atomic commits that touch both FPGA and UHD codebases. Continuous
integration testing is also simplified by merging the repositories,
because it was previously difficult to automatically derive the correct
UHD branch when testing a feature branch on the FPGA repository.

This commit also updates the license files and paths therein.

We are therefore merging the repositories again. Future development for
FPGA code will happen in the same repository as the UHD host code and
MPM code.

== Original Codebase and Rebasing ==

The original FPGA repository will be hosted for the foreseeable future
at its original local location: https://github.com/EttusResearch/fpga/

It can be used for bisecting, reference, and a more detailed history.

The final commit from said repository to be merged here is
05003794e2da61cabf64dd278c45685a7abad7ec. This commit is tagged as
v4.0.0.0-pre-uhd-merge.

If you have changes in the FPGA repository that you want to rebase onto
the UHD repository, simply run the following commands:

- Create a directory to store patches (this should be an empty
  directory):

    mkdir ~/patches

- Now make sure that your FPGA codebase is based on the same state as
  the code that was merged:

    cd src/fpga # Or wherever your FPGA code is stored
    git rebase v4.0.0.0-pre-uhd-merge

  Note: The rebase command may look slightly different depending on what
  exactly you're trying to rebase.

- Create a patch set for your changes versus v4.0.0.0-pre-uhd-merge:

    git format-patch v4.0.0.0-pre-uhd-merge -o ~/patches

  Note: Make sure that only patches are stored in your output directory.
  It should otherwise be empty. Make sure that you picked the correct
  range of commits, and only commits you wanted to rebase were exported
  as patch files.

- Go to the UHD repository and apply the patches:

    cd src/uhd # Or wherever your UHD repository is stored
    git am --directory fpga ~/patches/*
    rm -rf ~/patches # This is for cleanup

== Contributors ==

The following people have contributed mainly to these files (this list
is not complete):

Co-authored-by: Alex Williams <alex.williams@ni.com>
Co-authored-by: Andrej Rode <andrej.rode@ettus.com>
Co-authored-by: Ashish Chaudhari <ashish@ettus.com>
Co-authored-by: Ben Hilburn <ben.hilburn@ettus.com>
Co-authored-by: Ciro Nishiguchi <ciro.nishiguchi@ni.com>
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com>
Co-authored-by: Derek Kozel <derek.kozel@ettus.com>
Co-authored-by: EJ Kreinar <ej@he360.com>
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>
Co-authored-by: Ian Buckley <ian.buckley@gmail.com>
Co-authored-by: Jörg Hofrichter <joerg.hofrichter@ni.com>
Co-authored-by: Jon Kiser <jon.kiser@ni.com>
Co-authored-by: Josh Blum <josh@joshknows.com>
Co-authored-by: Jonathon Pendlum <jonathan.pendlum@ettus.com>
Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Matt Ettus <matt@ettus.com>
Co-authored-by: Michael West <michael.west@ettus.com>
Co-authored-by: Moritz Fischer <moritz.fischer@ettus.com>
Co-authored-by: Nick Foster <nick@ettus.com>
Co-authored-by: Nicolas Cuervo <nicolas.cuervo@ettus.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Paul David <paul.david@ettus.com>
Co-authored-by: Ryan Marlow <ryan.marlow@ettus.com>
Co-authored-by: Sugandha Gupta <sugandha.gupta@ettus.com>
Co-authored-by: Sylvain Munaut <tnt@246tNt.com>
Co-authored-by: Trung Tran <trung.tran@ettus.com>
Co-authored-by: Vidush Vishwanath <vidush.vishwanath@ettus.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>


Original-commit: bafa9d95453387814ef25e6b6256ba8db2df612f
2020-01-28 09:35:36 -08:00
Martin Braun 74893643ca Removed copy of FPGA source files.
Original-commit: fd3e84941de463fa1a7ebab0a69515b4bf2614cd
2014-10-07 11:25:20 +02:00
Ben Hilburn fbbc991a7d Pushing the bulk of UHD-3.7.0 code.
Original-commit: ff1546f8137f7f92bb250f685561b0c34cc0e053
2014-02-14 12:05:07 -08:00