Wade Fife ef9b86ec03 fpga: tools: Fix CSV reporting in run_testbenches.py ...

Original-commit: 1c719bc0a6ff8ceba7da74ee42bcceb43d164d2b

2025-03-07 12:40:20 +01:00

export/x300/radio

Fix instances of sim preamble

2024-09-17 08:43:22 -05:00

lib

fpga: lib: Fix trailing bytes in eth_ipv4_chdr_adapter

2025-03-03 09:02:29 -06:00

sim

fpga: sim: Add coerce function to PkgMath

2025-02-26 22:09:04 -06:00

tools

fpga: tools: Fix CSV reporting in run_testbenches.py

2025-03-07 12:40:20 +01:00

top

fpga: x400: Change NUM_DRAM_BANKS to 2 on X410 X4_400 image

2025-02-27 10:53:07 -06:00

.gitignore

fpga: Add more spurious files to gitignore

2023-12-13 17:28:09 -06:00

build.py

fpga: Replace references to python -> python3

2023-12-05 15:43:08 -06:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

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84 MiB

Languages

Verilog 42.5%

VHDL 13%

SystemVerilog 12%

HTML 11.1%

C 9.6%

Other 11.6%