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Wade Fife c9d2c066f3 fpga: lib: Fix pass-through mode in axi_fifo 
A missing "else" after 6ea4e48 was causing two configurations to occur
at the same time for some values of SIZE.

This commit also sets the "space" and "occupied" outputs to 0 when in
pass-through mode.


Original-commit: 19b5c85b514e1c37238308e405108c69ecbddb7e
2025-04-08 12:26:02 -05:00
..
axi
fpga: lib: Add AXI-Stream load split and merge modules
2025-02-14 15:59:19 -06:00
axi4_sv
fpga: lib: Add clock domain comments to interfaces
2021-06-03 11:26:54 -05:00
axi4lite_sv
fpga: lib: Minor cleanup of axi_lite.vh
2021-06-03 09:34:20 -05:00
axi4s_sv
fpga: lib: Fix Vivado warnings
2023-06-09 09:01:04 -05:00
control
fpga: lib: Add TO_SIGNED to usrp_utils.svh
2025-02-12 22:06:20 -06:00
control_200
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
dsp
fpga: rfnoc: lib: add AXI FIR filter for >1 SPC
2025-02-13 08:28:46 -06:00
extramfifo
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
fifo
fpga: lib: Fix pass-through mode in axi_fifo
2025-04-08 12:26:02 -05:00
fifo_200
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
gpif2
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
hls
fpga: lib: Fix addsub_hls
2022-08-25 13:55:30 -05:00
hwutils
fpga: Add module for reading Xilinx device DNA
2024-05-27 17:05:06 +02:00
io_cap_gen
fpga: e320: Improve timing on LVDS interface
2020-12-11 07:41:13 -06:00
io_port2
fpga: Replace references to python -> python3
2023-12-05 15:43:08 -06:00
ip
fpga: lib: Update FFT IP for parallel builds
2025-04-04 08:11:57 -05:00
packet_proc
fpga: lib: Pipeline and add clken to ip_hdr_checksum
2020-06-24 09:55:14 -05:00
packet_proc_200
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
radio_200
fpga: Re-order error and data packets
2021-08-10 15:19:32 -05:00
rfnoc
fpga: lib: redirect old ctrlport modules to interface based ones
2025-03-21 09:09:09 -05:00
sec
fpga/rfnoc: Add license checker block
2024-05-27 17:05:06 +02:00
sim
fpga: lib: Add AXI-Stream load split and merge modules
2025-02-14 15:59:19 -06:00
simple_gemac
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
timing
fpga: rfnoc: Remove deprecated files
2020-08-23 13:52:26 -05:00
vita_200
sim: Update chdr_16sc_to_sc12 testbench
2021-08-10 15:19:32 -05:00
vivado_ipi
fpga: Add READMEs describing Lattice and ADI IP sourcing
2022-07-14 16:26:03 -05:00
wb_spi
fpga: lib: extend wb_spi ability to limit transmission length
2020-06-04 14:46:19 -05:00
white_rabbit/wr_cores_v4_2
fpga: lib: Fix inferred latch in ep_autonegotiation
2022-11-18 14:53:41 -06:00
wishbone
fpga: lib: Add ctrl_port_to_wb_i2c module
2023-05-25 07:08:07 -05:00
xge
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
xge_interface
fpga: lib: Fix small packets stuck in 10 GbE TX
2020-10-05 16:03:21 -05:00
zpu
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
zynq_fifo
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00