Wade Fife ea0b8f4012 fpga: x400: Add CE clock ...

Adds a 266.667 MHz compute engine clock and uses it instead of the
radio clock for the DDC and DUC. Using a faster clock than the radio
allows the DDC and DUC to drain after a stall in the data flow.


Original-commit: ab93cb0929b9536b6d6cbfdc4813e6ba169053ae

2023-10-18 22:23:55 -05:00

..

pins

fpga: Add X440/FBX support

2023-06-12 10:27:29 -05:00

timing

fpga: x400: Add CE clock

2023-10-18 22:23:55 -05:00