Markus Schill 6386d90b35 fpga: lib: Add initial value to ram_2port ...

Original-commit: da5c64bf4f631012b5969890a751084c998dd154

2025-04-09 13:50:17 -05:00

export/x300/radio

Fix instances of sim preamble

2024-09-17 08:43:22 -05:00

lib

fpga: lib: Add initial value to ram_2port

2025-04-09 13:50:17 -05:00

sim

fpga: sim: Restore PkgChdrUtils for compatability

2025-04-08 12:24:51 -05:00

tools

fpga: tools: Add assert option to synthesis

2025-04-03 11:01:14 -05:00

top

fpga: x4xx: add reset option for gearboxes

2025-04-02 08:02:11 +02:00

.gitignore

fpga: Add more spurious files to gitignore

2023-12-13 17:28:09 -06:00

build.py

fpga: Replace references to python -> python3

2023-12-05 15:43:08 -06:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

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