Ashish Chaudhari adf2da6ac7 fpga: Multiple X300 FPGA bugfixes and enhancements ...

- Fixed 10GigE firmware communication issues and sequence errors for TX
- Multiple changes to help ease timing closure
- Cleaned up build scripts
- Switched to Xilinx ISE 14.7 as the default build tool for X300


Original-commit: 64d71dcbc5fa6790385b288de25224d386b047b0

2014-09-24 18:45:31 -07:00

..

axi64_to_xge64.v

Pushing the bulk of UHD-3.7.0 code.

2014-02-14 12:05:07 -08:00

axi_count_packets_in_fifo.v

Pushing the bulk of UHD-3.7.0 code.

2014-02-14 12:05:07 -08:00

Makefile.srcs

Pushing the bulk of UHD-3.7.0 code.

2014-02-14 12:05:07 -08:00

xge64_to_axi64.v

Pushing the bulk of UHD-3.7.0 code.

2014-02-14 12:05:07 -08:00

xge_handshake.v

Pushing the bulk of UHD-3.7.0 code.

2014-02-14 12:05:07 -08:00

xge_mac_wrapper.v

fpga: Multiple X300 FPGA bugfixes and enhancements

2014-09-24 18:45:31 -07:00