Wade Fife 3d3c75f74d fpga: e320: Add DRAM ports ...

This adds two additional ports to the DRAM, for a total of up to
four channels connected to DRAM.


Original-commit: a91d8e49655dd6f69ce1153498266c1a95230772

2022-02-18 06:42:09 -07:00

export/x300/radio

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

lib

fpga: rfnoc: Change AWIDTH default for axi_ram_fifo

2022-02-10 19:46:39 -07:00

sim

fpga: Remove noc_shell_regs.vh and sim_rfnoc_lib.svh

2022-01-25 14:09:15 -07:00

tools

images: Remove references to N230

2022-02-15 14:07:53 -06:00

top

fpga: e320: Add DRAM ports

2022-02-18 06:42:09 -07:00

.gitignore

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

build.py

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

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