Max Köhler 275373c06b fpga: tools: viv_ip_utils to update hdl_sources.tcl ...

Original-commit: 1e8521f52ee9ba778d4240f1a0a197642f3cee8d

2024-03-08 08:23:49 -06:00

export/x300/radio

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

lib

fpga: Replace references to python -> python3

2023-12-05 15:43:08 -06:00

sim

fpga: sim: Fix typo in clk_wait_f

2022-12-19 08:57:18 -06:00

tools

fpga: tools: viv_ip_utils to update hdl_sources.tcl

2024-03-08 08:23:49 -06:00

top

fpga: x400: zbx: Improve Lattice make flow

2024-03-05 20:07:50 -06:00

.gitignore

fpga: Add more spurious files to gitignore

2023-12-13 17:28:09 -06:00

build.py

fpga: Replace references to python -> python3

2023-12-05 15:43:08 -06:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

Description

No description provided

84 MiB

Languages

Verilog 42.5%

VHDL 13%

SystemVerilog 12%

HTML 11.1%

C 9.6%

Other 11.6%