Wade Fife 1c0724aae2 fpga: n3xx: Fix DRAM FIFO address alignment ...

Original-commit: 59e35418ea5e6a0383e124425829e3de7dfa3237

2022-02-10 19:46:39 -07:00

export/x300/radio

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

lib

fpga: rfnoc: Change AWIDTH default for axi_ram_fifo

2022-02-10 19:46:39 -07:00

sim

fpga: Remove noc_shell_regs.vh and sim_rfnoc_lib.svh

2022-01-25 14:09:15 -07:00

tools

images: Add utilization report files to B2xx image files

2022-02-10 11:35:47 -07:00

top

fpga: n3xx: Fix DRAM FIFO address alignment

2022-02-10 19:46:39 -07:00

.gitignore

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

build.py

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

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