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fpga: Add X440/FBX support

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Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Wade Fife <wade.fife@ni.com>
Co-authored-by: Ryan Marlow <ryan@lmarlow.com>


Original-commit: 596760a12e4834e47589c12f8a4fd083aa2f7c25
This commit is contained in:
Javier Valenzuela
2023-06-12 10:27:29 -05:00
committed by Aki Tomita
co-authored by Martin Braun Wade Fife Ryan Marlow
parent a405111ce7
commit 5cadf901c7
121 changed files with 20670 additions and 8739 deletions
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lib/rfnoc/blocks/rfnoc_block_replay/axis_replay.v
+6 -2
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@@ -168,8 +168,12 @@ module axis_replay #(
// The lower MEM_ALIGN bits for all memory byte addresses should be 0.
localparam MEM_ALIGN = $clog2(MEM_DATA_W / 8);
//
// AXI alignment requirement (4096 bytes) in MEM_DATA_W-bit words
localparam AXI_ALIGNMENT = 4096 / BYTES_PER_WORD;
// Burst length in bytes
localparam BURST_LENGTH = 2**MEM_COUNT_W * BYTES_PER_WORD;
//
// AXI alignment requirement (normally 4096 bytes) in MEM_DATA_W-bit words
localparam AXI_ALIGNMENT = (BURST_LENGTH <= 4096) ? 4096 / BYTES_PER_WORD :
BURST_LENGTH / BYTES_PER_WORD;
// Memory Buffering Parameters
//
lib/rfnoc/blocks/rfnoc_block_replay/rfnoc_block_replay.v
+22 -19
View File
@@ -15,26 +15,30 @@
//
// Parameters:
//
// THIS_PORTID : Control crossbar port to which this block is connected
// CHDR_W : AXIS-CHDR data bus width
// MTU : Maximum transmission unit (i.e., maximum packet size in
// CHDR words is 2**MTU).
// NUM_PORTS : Number of replay instances to instantiate. Each one will
// have its own register set and memory interface.
// MEM_DATA_W : Data width to use for the memory interface.
// MEM_ADDR_W : Byte address width to use for the memory interface.
// THIS_PORTID : Control crossbar port to which this block is connected
// CHDR_W : AXIS-CHDR data bus width
// MTU : Maximum transmission unit (i.e., maximum packet size in
// CHDR words is 2**MTU).
// NUM_PORTS : Number of replay instances to instantiate. Each one will
// have its own register set and memory interface.
// MEM_DATA_W : Data width to use for the memory interface.
// MEM_ADDR_W : Byte address width to use for the memory interface.
// BURST_LENGTH : Burst length to use in bytes. Must not exceed 256 words. It
// can be larger than the 4096-byte limit of AXI, but this
// might not be compatible with all memories.
//
`default_nettype none
module rfnoc_block_replay #(
parameter [9:0] THIS_PORTID = 10'd0,
parameter CHDR_W = 64,
parameter [5:0] MTU = 10,
parameter NUM_PORTS = 1,
parameter MEM_DATA_W = 64,
parameter MEM_ADDR_W = 30
parameter [9:0] THIS_PORTID = 10'd0,
parameter CHDR_W = 64,
parameter [5:0] MTU = 10,
parameter NUM_PORTS = 1,
parameter MEM_DATA_W = 64,
parameter MEM_ADDR_W = 30,
parameter BURST_LENGTH = MEM_DATA_W/8 * 256
) (
//---------------------------------------------------------------------------
// AXIS-CHDR Port
@@ -323,11 +327,10 @@ module rfnoc_block_replay #(
//---------------------------------------------------------------------------
// Width of memory transfer count. This controls the maximum burst length
// supported by the Replay block. For AXI compatibility, it must be 8 or less
// and should not represent more than 4 KiB. Here we set it to 2 KiB by
// default.
localparam MEM_COUNT_W = (MEM_DATA_W <= 64) ? 8 : // Max width allowed
$clog2(2048 / (MEM_DATA_W/8)); // 2 KiB
// supported by the Replay block. For AXI, it must not exceed 8 and it should
// be no more than 4096 unless supported by the memory being used.
localparam DESIRED_MEM_COUNT_W = $clog2(BURST_LENGTH / (MEM_DATA_W/8));
localparam MEM_COUNT_W = (DESIRED_MEM_COUNT_W > 8) ? 8 : DESIRED_MEM_COUNT_W;
genvar i;
generate
lib/rfnoc/blocks/rfnoc_block_replay/rfnoc_block_replay_tb.sv
+2 -1
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@@ -209,7 +209,8 @@ module rfnoc_block_replay_tb#(
.DWIDTH (MEM_DATA_W),
.IDWIDTH (1),
.BIG_ENDIAN (0),
.STALL_PROB (STALL_PROB)
.STALL_PROB (STALL_PROB),
.NO_4KB_LIMIT(MEM_DATA_W/8 * 256 > 4096)
) sim_axi_ram_i (
.s_aclk (mem_clk),
.s_aresetn (~mem_rst),