miegl/b210-k7-fpga
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
eb84b6c949dfb3df2d0f2499eb85d2fed36f2aef
b210-k7-fpga/top/b200/Define.vh
T

1 line
19 B
Systemverilog
Raw Blame History

`define TARGET_B210
Reference in New Issue View Git Blame Copy Permalink