Wade Fife 1c0724aae2 fpga: n3xx: Fix DRAM FIFO address alignment ...

Original-commit: 59e35418ea5e6a0383e124425829e3de7dfa3237

2022-02-10 19:46:39 -07:00

..

b2xxmini

fpga: b2xx: Generate utilization report files

2022-02-10 11:35:47 -07:00

b200

fpga: b2xx: Generate utilization report files

2022-02-10 11:35:47 -07:00

e31x

fpga: e31x: Add DRAM support

2022-02-10 18:13:44 -07:00

e320

fpga: e320: Connect CTRL_IN pins to FPGA

2022-01-10 08:46:56 -06:00

n3xx

fpga: n3xx: Fix DRAM FIFO address alignment

2022-02-10 19:46:39 -07:00

python

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

tcl

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

x300

fpga: x300: Fix time register readback

2021-12-15 17:16:32 -06:00

x400

fpga: x400: Add DRAM enable macro

2022-02-10 13:18:58 -07:00

Makefile.common

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00