Wade Fife c322899053 fpga: e31x: Add DRAM support ...

This adds DRAM support to E31x devices. Due to the size of the DDR3
memory controller, it is not enabled by default. You can include the
memory controller IP in the build by adding the DRAM environment
variable to your build. For example:

DRAM=1 make E310_SG3


Original-commit: 788fef11ef890c6dcee3be495fc381bcf2990d3b

2022-02-10 18:13:44 -07:00

export/x300/radio

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

lib

fpga: rfnoc: Add BLANK_OUTPUT to FIR filter block's parameters

2022-02-10 18:11:41 -07:00

sim

fpga: Remove noc_shell_regs.vh and sim_rfnoc_lib.svh

2022-01-25 14:09:15 -07:00

tools

images: Add utilization report files to B2xx image files

2022-02-10 11:35:47 -07:00

top

fpga: e31x: Add DRAM support

2022-02-10 18:13:44 -07:00

.gitignore

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

build.py

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

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