Wade Fife b4943f4a61 fpga: tools: Disable common simulation warnings ...

This change sets StdArithNoWarnings and NumericStdNoWarnings by
default for ModelSim simulations. Without this, an excessive number of
warnings can be generated by Xilinx IP during simulation.


Original-commit: f094aa7ae0f864764276c5c67c51b21547327fb0

2025-03-17 13:40:26 -05:00

export/x300/radio

Fix instances of sim preamble

2024-09-17 08:43:22 -05:00

lib

fpga: rfnoc: fft: Support multiple samples per cycle

2025-03-07 12:39:34 -06:00

sim

fpga: sim: Add coerce function to PkgMath

2025-02-26 22:09:04 -06:00

tools

fpga: tools: Disable common simulation warnings

2025-03-17 13:40:26 -05:00

top

fpga: x400: Change NUM_DRAM_BANKS to 2 on X410 X4_400 image

2025-02-27 10:53:07 -06:00

.gitignore

fpga: Add more spurious files to gitignore

2023-12-13 17:28:09 -06:00

build.py

fpga: Replace references to python -> python3

2023-12-05 15:43:08 -06:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

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