Files
b210-k7-fpga/lib/zynq_fifo/Makefile.srcs
T
Ben Hilburn fbbc991a7d Pushing the bulk of UHD-3.7.0 code.
Original-commit: ff1546f8137f7f92bb250f685561b0c34cc0e053
2014-02-14 12:05:07 -08:00

16 lines
369 B
Makefile

#
# Copyright 2012 Ettus Research LLC
#
##################################################
# ZYNQ FIFO interface sources
##################################################
ZYNQ_FIFO_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/zynq_fifo/, \
zf_arbiter.v \
zf_stream_to_host.v \
zf_host_to_stream.v \
zf_slave_readback.v \
zf_slave_settings.v \
zynq_fifo_top.v \
))