Files
b210-k7-fpga/lib
michael-west 8332f5b161 fpga: Fix sc16 to sc12 converter
Re-wrote converter to remove clock cycle delay on i_tready when handling
residual output and fixed improper handling of tlast during residual
data processing.  Resolves some USB overflow issues when using sc12 data
type on B200 devices.

Signed-off-by: michael-west <michael.west@ettus.com>


Original-commit: 1fecf446e0358aa2b6a2d1f73a0daeac516435a0
2021-08-10 15:19:32 -05:00
..
2020-08-04 15:40:08 -05:00
2020-05-28 15:04:05 -05:00
2021-08-08 14:59:26 -05:00
2021-08-08 14:59:26 -05:00
2021-06-03 11:26:54 -05:00
2021-08-10 15:19:32 -05:00