miegl/b210-k7-fpga
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
417 Commits 1 Branch 0 Tags
72c3a524c7b479ef4351a23569df7848064686b7
T
Clone
Open with VS Code Open with VSCodium Open with Intellij IDEA
Download ZIP Download TAR.GZ Download BUNDLE
Javier Valenzuela 72c3a524c7 fpga: x440: cpld: led control cleanup 
Original-commit: 1024b69d0c6b32176adf5f6f2269149ef0c34837
2023-09-14 12:58:47 -05:00
export/x300/radio
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
lib
fpga: Add X440/FBX support
2023-06-12 10:27:29 -05:00
sim
fpga: sim: Fix typo in clk_wait_f
2022-12-19 08:57:18 -06:00
tools
fpga: Add X440/FBX support
2023-06-12 10:27:29 -05:00
top
fpga: x440: cpld: led control cleanup
2023-09-14 12:58:47 -05:00
.gitignore
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
build.py
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
LICENSE.md
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
S
Description
No description provided
84 MiB
Languages
Verilog 42.5%
VHDL 13%
SystemVerilog 12%
HTML 11.1%
C 9.6%
Other 11.6%