100 lines
3.5 KiB
Tcl
100 lines
3.5 KiB
Tcl
# SPDX-License-Identifier: GPL-3.0-or-later
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# Recreate the B210 Kintex-7 Vivado project from version-controlled sources.
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#
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# This is Project Mode on purpose: it retains Vivado's normal run management
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# while keeping the Git tree authoritative and the generated .xpr disposable.
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set B210_SCRIPT_DIR [file dirname [file normalize [info script]]]
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set B210_REPO_ROOT [file normalize [file join $B210_SCRIPT_DIR ../..]]
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source [file join $B210_SCRIPT_DIR project_config.tcl]
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source [file join $B210_SCRIPT_DIR sources.tcl]
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if {[info exists ::env(B210_BUILD_ROOT)] && $::env(B210_BUILD_ROOT) ne ""} {
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set B210_BUILD_ROOT [file normalize $::env(B210_BUILD_ROOT)]
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} else {
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set B210_BUILD_ROOT [file join $B210_REPO_ROOT build vivado]
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}
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set B210_PROJECT_DIR [file join $B210_BUILD_ROOT $B210_PROJECT_NAME]
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proc b210_repo_file {relpath} {
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global B210_REPO_ROOT
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set p [file normalize [file join $B210_REPO_ROOT $relpath]]
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if {![file exists $p]} {
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error "Manifest source does not exist: $relpath\nResolved path: $p"
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}
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return $p
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}
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# Reproducibility guard. Set B210_ALLOW_VIVADO_MISMATCH=1 only for deliberate
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# migration work; once migration is committed, update project_config.tcl.
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set actual_vivado [version -short]
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if {$actual_vivado ne $B210_EXPECTED_VIVADO} {
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set allow 0
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if {[info exists ::env(B210_ALLOW_VIVADO_MISMATCH)]} {
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set allow $::env(B210_ALLOW_VIVADO_MISMATCH)
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}
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if {!$allow} {
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error "Expected Vivado $B210_EXPECTED_VIVADO, found $actual_vivado. Set B210_ALLOW_VIVADO_MISMATCH=1 only for intentional migration work."
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}
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puts "WARNING: expected Vivado $B210_EXPECTED_VIVADO, running $actual_vivado because B210_ALLOW_VIVADO_MISMATCH is set"
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}
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file mkdir $B210_BUILD_ROOT
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create_project $B210_PROJECT_NAME $B210_PROJECT_DIR \
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-part $B210_PART \
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-force
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set_property target_language Verilog [current_project]
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set_property default_lib xil_defaultlib [current_project]
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# Add RTL/netlist/memory files by reference. Nothing is copied into .srcs.
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foreach rel $B210_GLOBAL_INCLUDE_SOURCES {
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set f [b210_repo_file $rel]
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set added [add_files -fileset sources_1 -norecurse $f]
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set_property IS_GLOBAL_INCLUDE true $added
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}
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foreach rel $B210_HDL_SOURCES {
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add_files -fileset sources_1 -norecurse [b210_repo_file $rel]
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}
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foreach rel $B210_NETLIST_SOURCES {
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add_files -fileset sources_1 -norecurse [b210_repo_file $rel]
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}
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foreach rel $B210_MEMORY_SOURCES {
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add_files -fileset sources_1 -norecurse [b210_repo_file $rel]
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}
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# Import the canonical XCI into the disposable generated project. AMD documents
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# import_ip as the Project-Mode command that copies an XCI into the project;
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# generated IP state therefore stays below build/ rather than beside the
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# canonical version-controlled XCI.
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foreach rel $B210_IP_SOURCES {
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import_ip [b210_repo_file $rel]
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}
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foreach rel $B210_CONSTRAINT_SOURCES {
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add_files -fileset constrs_1 -norecurse [b210_repo_file $rel]
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}
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set_property top $B210_TOP [get_filesets sources_1]
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set_property top $B210_TOP [get_filesets sim_1]
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# Match the original project behavior: generate a raw .bin alongside .bit.
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set_property STEPS.WRITE_BITSTREAM.ARGS.BIN_FILE true [get_runs impl_1]
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# Generate IP output products from the imported XCI. An OOC synthesis run is
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# created/started by build.tcl before top-level synthesis.
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foreach ip_obj [get_ips] {
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generate_target all $ip_obj
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}
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update_compile_order -fileset sources_1
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update_compile_order -fileset sim_1
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puts "Created reproducible project: $B210_PROJECT_DIR"
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puts "Top: $B210_TOP"
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puts "Part: $B210_PART"
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