# SPDX-License-Identifier: GPL-3.0-or-later # Recreate the B210 Kintex-7 Vivado project from version-controlled sources. # # This is Project Mode on purpose: it retains Vivado's normal run management # while keeping the Git tree authoritative and the generated .xpr disposable. set B210_SCRIPT_DIR [file dirname [file normalize [info script]]] set B210_REPO_ROOT [file normalize [file join $B210_SCRIPT_DIR ../..]] source [file join $B210_SCRIPT_DIR project_config.tcl] source [file join $B210_SCRIPT_DIR sources.tcl] if {[info exists ::env(B210_BUILD_ROOT)] && $::env(B210_BUILD_ROOT) ne ""} { set B210_BUILD_ROOT [file normalize $::env(B210_BUILD_ROOT)] } else { set B210_BUILD_ROOT [file join $B210_REPO_ROOT build vivado] } set B210_PROJECT_DIR [file join $B210_BUILD_ROOT $B210_PROJECT_NAME] proc b210_repo_file {relpath} { global B210_REPO_ROOT set p [file normalize [file join $B210_REPO_ROOT $relpath]] if {![file exists $p]} { error "Manifest source does not exist: $relpath\nResolved path: $p" } return $p } # Reproducibility guard. Set B210_ALLOW_VIVADO_MISMATCH=1 only for deliberate # migration work; once migration is committed, update project_config.tcl. set actual_vivado [version -short] if {$actual_vivado ne $B210_EXPECTED_VIVADO} { set allow 0 if {[info exists ::env(B210_ALLOW_VIVADO_MISMATCH)]} { set allow $::env(B210_ALLOW_VIVADO_MISMATCH) } if {!$allow} { error "Expected Vivado $B210_EXPECTED_VIVADO, found $actual_vivado. Set B210_ALLOW_VIVADO_MISMATCH=1 only for intentional migration work." } puts "WARNING: expected Vivado $B210_EXPECTED_VIVADO, running $actual_vivado because B210_ALLOW_VIVADO_MISMATCH is set" } file mkdir $B210_BUILD_ROOT create_project $B210_PROJECT_NAME $B210_PROJECT_DIR \ -part $B210_PART \ -force set_property target_language Verilog [current_project] set_property default_lib xil_defaultlib [current_project] # Add RTL/netlist/memory files by reference. Nothing is copied into .srcs. foreach rel $B210_GLOBAL_INCLUDE_SOURCES { set f [b210_repo_file $rel] set added [add_files -fileset sources_1 -norecurse $f] set_property IS_GLOBAL_INCLUDE true $added } foreach rel $B210_HDL_SOURCES { add_files -fileset sources_1 -norecurse [b210_repo_file $rel] } foreach rel $B210_NETLIST_SOURCES { add_files -fileset sources_1 -norecurse [b210_repo_file $rel] } foreach rel $B210_MEMORY_SOURCES { add_files -fileset sources_1 -norecurse [b210_repo_file $rel] } # Import the canonical XCI into the disposable generated project. AMD documents # import_ip as the Project-Mode command that copies an XCI into the project; # generated IP state therefore stays below build/ rather than beside the # canonical version-controlled XCI. foreach rel $B210_IP_SOURCES { import_ip [b210_repo_file $rel] } foreach rel $B210_CONSTRAINT_SOURCES { add_files -fileset constrs_1 -norecurse [b210_repo_file $rel] } set_property top $B210_TOP [get_filesets sources_1] set_property top $B210_TOP [get_filesets sim_1] # Match the original project behavior: generate a raw .bin alongside .bit. set_property STEPS.WRITE_BITSTREAM.ARGS.BIN_FILE true [get_runs impl_1] # Generate IP output products from the imported XCI. An OOC synthesis run is # created/started by build.tcl before top-level synthesis. foreach ip_obj [get_ips] { generate_target all $ip_obj } update_compile_order -fileset sources_1 update_compile_order -fileset sim_1 puts "Created reproducible project: $B210_PROJECT_DIR" puts "Top: $B210_TOP" puts "Part: $B210_PART"