Files
b210-k7-fpga/top/x400/rf/common/Makefile.srcs
T
5cadf901c7 fpga: Add X440/FBX support
Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Wade Fife <wade.fife@ni.com>
Co-authored-by: Ryan Marlow <ryan@lmarlow.com>


Original-commit: 596760a12e4834e47589c12f8a4fd083aa2f7c25
2023-06-12 10:27:29 -05:00

23 lines
480 B
Makefile

#
# Copyright 2021 Ettus Research, a National Instruments Brand
#
# SPDX-License-Identifier: LGPL-3.0-or-later
#
RF_COMMON_SRCS = $(abspath $(addprefix $(BASE_DIR)/../top/x400/rf/common/, \
PkgRf.vhd \
adc_iq_repacker.v \
axis_mux.vhd \
capture_sysref.v \
gpio_to_axis_mux.vhd \
rf_nco_reset.vhd \
rf_reset.vhd \
scale_2x.vhd \
sync_wrapper.v \
))
RF_X410_SRCS = $(abspath $(addprefix $(BASE_DIR)/../top/x400/rf/x410/, \
x410_rf_reset_controller.vhd \
x410_clock_gates.vhd \
))