Logo
Explore Help
Sign In
miegl/b210-k7-fpga
Watch 1
Star 0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
3ed06cc86114cc3e229d8def7360a29888bbd0fe
b210-k7-fpga/top
T
History
Friedrich Wenisch 3ed06cc861 fpga: x400: refactor RFDC block diagrams and timing constraints
Original-commit: a7bce74be154de9a68d6bdf2f9a6651b480b6dfa
2025-02-13 07:51:05 -06:00
..
b2xxmini
fpga: b2xx: Generate utilization report files
2022-02-10 11:35:47 -07:00
b200
fpga: b2xx: Generate utilization report files
2022-02-10 11:35:47 -07:00
e31x
image builder: Use RADIO_NIPC parameter
2024-11-05 15:30:50 +01:00
e320
fpga: e31x/e320/n3xx/x400: Rework device tree file generation
2024-09-13 08:44:30 -05:00
n3xx
Fix instances of sim preamble
2024-09-17 08:43:22 -05:00
python
fpga: Replace references to python -> python3
2023-12-05 15:43:08 -06:00
tcl
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300
Fix instances of sim preamble
2024-09-17 08:43:22 -05:00
x400
fpga: x400: refactor RFDC block diagrams and timing constraints
2025-02-13 07:51:05 -06:00
Makefile.common
fpga: Replace references to python -> python3
2023-12-05 15:43:08 -06:00
Powered by Gitea Version: 1.27.3 Page: 109ms Template: 8ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API