Wade Fife 3cb320fae0 fpga: rfnoc: Add defaults for rate changing ...

Add DEFAULT_M and DEFAULT_N parameters for rate changing cores.
This allows the host to not need to configure fixed rate change
cores.


Original-commit: 983fad664436301c31c3bc8c81b538a41537598b

2020-05-28 15:12:20 -05:00

export/x300/radio

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

lib

fpga: rfnoc: Add defaults for rate changing

2020-05-28 15:12:20 -05:00

sim

fpga: sim: Add packet_info_equal function

2020-05-28 15:04:05 -05:00

tools

fpga: tools: Improve detection of setupenv sourcing

2020-05-28 15:11:29 -05:00

top

x300: Expand DRAM address space to 1G

2020-05-18 17:50:38 -05:00

.gitignore

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

build.py

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

Description

No description provided

84 MiB

Languages

Verilog 42.5%

VHDL 13%

SystemVerilog 12%

HTML 11.1%

C 9.6%

Other 11.6%