miegl/b210-k7-fpga
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Mark Eid 1b9a79381a fpga: x400: Fix PRC divider register map 
Original-commit: 367adaa35e1f707be52011d491025193e4436eb1
2023-07-10 10:45:09 -06:00
export/x300/radio
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
lib
fpga: Add X440/FBX support
2023-06-12 10:27:29 -05:00
sim
fpga: sim: Fix typo in clk_wait_f
2022-12-19 08:57:18 -06:00
tools
fpga: Add X440/FBX support
2023-06-12 10:27:29 -05:00
top
fpga: x400: Fix PRC divider register map
2023-07-10 10:45:09 -06:00
.gitignore
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
build.py
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
LICENSE.md
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
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84 MiB
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