Wade Fife 0e6459250b fpga: tools: Force write when saving Vivado project file ...

Original-commit: 6abfd8a49aa3037a6784dd6acef801bed5ae3ed7

2024-06-11 10:20:08 +02:00

export/x300/radio

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

lib

fpga: Add passthru CHDR/DMA transport adapter module

2024-06-11 10:20:07 +02:00

sim

fpga: rfnoc: Enable blocks with no inputs/outputs

2024-05-27 17:05:06 +02:00

tools

fpga: tools: Force write when saving Vivado project file

2024-06-11 10:20:08 +02:00

top

fpga: Align build process for all targets

2024-06-11 10:20:08 +02:00

.gitignore

fpga: Add more spurious files to gitignore

2023-12-13 17:28:09 -06:00

build.py

fpga: Replace references to python -> python3

2023-12-05 15:43:08 -06:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

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