Andrew Moch 02e4ef3318 fpga: sim: Fix AxiLiteBfm ...

AxiLiteBfm incorrectly included stb argument on rd() and printed actual
response instead of expected in debug message.


Original-commit: cb7e9e24578ccf4db79878a7437a6a85ad315ee2

2020-07-31 13:10:00 -05:00

export/x300/radio

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

lib

fpga: lib: Update AxiLiteIf

2020-07-31 11:55:47 -05:00

sim

fpga: sim: Fix AxiLiteBfm

2020-07-31 13:10:00 -05:00

tools

fpga: tools: RESOLVE_PATH checks for an empty path

2020-07-30 15:00:06 -05:00

top

fpga, mpm: Bump FPGA compat number

2020-07-24 15:24:14 -05:00

.gitignore

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

build.py

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

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