miegl/b210-k7-fpga
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f19fa3cf827cb00a1fff3f4e9e7320a9675ff6eb
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2 Commits
Author SHA1 Message Date
Max Köhler 2a89218e95 fpga: x400: add rf core ctrlport 
Original-commit: a9add0a6a5baefe7dcc8fbb5a39f01dc935c7a3e
 2024-11-12 15:57:36 -06:00
Max Köhler ea4f2ff009 fpga: x440: refactor rf_core_full to use parameters on ports 
Original-commit: 40bd20d240b2ee60ec58ad5a00a9ec9eebd1e9af
 2024-08-21 08:06:41 -05:00