2 Commits

Include renames

Author	SHA1	Message	Date
Wade Fife	b4943f4a61	fpga: tools: Disable common simulation warnings ... This change sets StdArithNoWarnings and NumericStdNoWarnings by default for ModelSim simulations. Without this, an excessive number of warnings can be generated by Xilinx IP during simulation. Original-commit: f094aa7ae0f864764276c5c67c51b21547327fb0	2025-03-17 13:40:26 -05:00
Wade Fife	23b44d6538	fpga: tools: Add do file for ModelSim ... Original-commit: 99982799869267550844d34a64fe82dfb1aaa79d	2024-10-08 18:15:52 -05:00