Javier Valenzuela
1ac4909e6f
fpga: x400: Expand PS GPIO port for DIO control
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Original-commit: 4bfbb9eeec92fdd3e9d7096006f63477d4848f76
2022-01-25 10:18:47 -07:00
Javier Valenzuela
4edae39d9e
fpga: x400: Connect Radio Blocks to DIO
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Original-commit: 87b2cf09301e90dfaf2a6554c424b62e0558e0b1
2022-01-25 10:18:47 -07:00
Humberto Jimenez
4082066a6f
fpga: x400: Refactor CPLDs build process
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This commit refactors the X410's CPLDs build process to make it similar to other
FPGA targets within the repo. The new process relies on basic Quartus build
utilities.
Additionally, this commit adds support for an alternative MAX10 CPLD for the
motherboard CPLD implementation. Both previous (10M04) and new variant
(10M08) are supported concurrently. The images package mapping is updated to
reflect these changes.
Original-commit: e1ce4565dbc7336ee806adce7c087bda4fcc77ae
2021-12-01 10:51:07 -06:00
a1d7c252c2
fpga: x400: zbx: Add support for ZBX CPLD
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Co-authored-by: Cherwa Vang <cherwa.vang@ni.com >
Co-authored-by: Martin Braun <martin.braun@ettus.com >
Co-authored-by: Max Köhler <max.koehler@ni.com >
Co-authored-by: Paul Butler <paul.butler@ni.com >
Original-commit: 99b841c75aa91709090cbf4046bf51b7ffb4f612
2021-06-10 11:56:58 -05:00
61782b02d7
fpga: x400: Add support for X410 motherboard FPGA
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Co-authored-by: Andrew Moch <Andrew.Moch@ni.com >
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com >
Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com >
Co-authored-by: Joerg Hofrichter <joerg.hofrichter@ni.com >
Co-authored-by: Kumaran Subramoniam <kumaran.subramoniam@ni.com >
Co-authored-by: Max Köhler <max.koehler@ni.com >
Co-authored-by: Michael Auchter <michael.auchter@ni.com >
Co-authored-by: Paul Butler <paul.butler@ni.com >
Co-authored-by: Wade Fife <wade.fife@ettus.com >
Co-authored-by: Hector Rubio <hrubio@ni.com >
Original-commit: 6d3765605262016a80f71e36357f749ea35cbe5a
2021-06-10 11:56:58 -05:00
Javier Valenzuela