fpga: bump compat number to 10.0

Original-commit: 1cb4898519dfc2661c4537ec06faa23ed4525329
2025-03-20 09:07:06 +01:00
parent 50f20ef4ab
commit e67d78533c
10 changed files with 49469 additions and 58045 deletions
@@ -71,6 +71,9 @@
 //  </group>
 //</regmap>
 //<regmap name="PL_DMA_MASTER_REGMAP" readablestrobes="false" generatevhdl="true" generateverilog="false" ettusguidelines="true">
+//  <conflicts>
+//    <conflict>AXI_HPC0_WINDOW AXI_HPC1_WINDOW</conflict>
+//  </conflicts>
 //  <info>
 //    This is a regmap to document the different ports that have access to the PS system memory.
 //    Each port may have different restrictions on system memory. See the corresponding window