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fpga: e31x: Add DRAM support

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This adds DRAM support to E31x devices. Due to the size of the DDR3
memory controller, it is not enabled by default. You can include the
memory controller IP in the build by adding the DRAM environment
variable to your build. For example:

DRAM=1 make E310_SG3


Original-commit: 788fef11ef890c6dcee3be495fc381bcf2990d3b
This commit is contained in:
Wade Fife
2022-02-10 18:13:44 -07:00
parent 83ad8e36ba
commit c322899053
15 changed files with 1499 additions and 99 deletions
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top/e31x/e310_rfnoc_image_core.vh
+2 -2
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@@ -1,5 +1,5 @@
//
// Copyright 2021 Ettus Research, A National Instruments Brand
// Copyright 2022 Ettus Research, A National Instruments Brand
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
@@ -12,7 +12,7 @@
// This file was automatically generated by the RFNoC image builder tool.
// Re-running that tool will overwrite this file!
//
// File generated on: 2021-05-03T08:51:11.441866
// File generated on: 2022-02-07T19:18:28.012652
// Source: e310_rfnoc_image_core.yml
// Source SHA256: 7fef622f1ae280dd7573abd823c7a6bbecf51921a74cea948e6bfb9f8f65e2cc
//