fpga: Add BUILD_SEED variable
Adds a BUILD_SEED make variable that can be set to a 32-bit integer, and adds an FPGA read-only register initialized by this variable. Changing this variable will randomly affect the FPGA build results. This can be useful when your build fails timing by a small amount, allowing you to build again and get different results with the same code. For example, you could run the following to produce an FPGA build with different timing results from the default build: make X310_XG BUILD_SEED=123 Original-commit: 3a3a03486f9221c2e59fa6d0826c23d17730956d
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@@ -1,5 +1,5 @@
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//
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// Copyright 2022 Ettus Research, A National Instruments Company
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// Copyright 2023 Ettus Research, A National Instruments Company
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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@@ -21,6 +21,7 @@
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// PPS_CTRL_REG : 0x1C (x4xx_global_regs.v)
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// CHDR_CLK_RATE_REG : 0x20 (x4xx_global_regs.v)
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// CHDR_CLK_COUNT_REG : 0x24 (x4xx_global_regs.v)
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// BUILD_SEED_REG : 0x28 (x4xx_global_regs.v)
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// GPS_CTRL_REG : 0x38 (x4xx_global_regs.v)
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// GPS_STATUS_REG : 0x3C (x4xx_global_regs.v)
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// DBOARD_CTRL_REG : 0x40 (x4xx_global_regs.v)
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@@ -181,6 +182,11 @@
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localparam CHDR_CLK_COUNT_REG_SIZE = 32; // register width in bits
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localparam CHDR_CLK_COUNT_REG_MASK = 32'h0;
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// BUILD_SEED_REG Register (from x4xx_global_regs.v)
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localparam BUILD_SEED_REG = 'h28; // Register Offset
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localparam BUILD_SEED_REG_SIZE = 32; // register width in bits
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localparam BUILD_SEED_REG_MASK = 32'h0;
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// GPS_CTRL_REG Register (from x4xx_global_regs.v)
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localparam GPS_CTRL_REG = 'h38; // Register Offset
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localparam GPS_CTRL_REG_SIZE = 32; // register width in bits
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