fpga: Add X440/FBX support
Co-authored-by: Martin Braun <martin.braun@ettus.com> Co-authored-by: Wade Fife <wade.fife@ni.com> Co-authored-by: Ryan Marlow <ryan@lmarlow.com> Original-commit: 596760a12e4834e47589c12f8a4fd083aa2f7c25
This commit is contained in:
committed by
Aki Tomita
co-authored by
Martin Braun
Wade Fife
Ryan Marlow
parent
a405111ce7
commit
5cadf901c7
@@ -85,7 +85,7 @@ module x4xx_core_common #(
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// Timekeeper (Domain: radio_clk)
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input wire [ 7:0] radio_spc,
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input wire sample_rx_stb,
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input wire [NUM_TIMEKEEPERS-1:0] sample_rx_stb,
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input wire [ 3:0] time_ignore_bits,
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output wire [64*NUM_TIMEKEEPERS-1:0] radio_time,
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@@ -352,11 +352,12 @@ module x4xx_core_common #(
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.s_ctrlport_resp_ack (timekeeper_resp_ack[tk_i]),
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.s_ctrlport_resp_data (timekeeper_resp_data[CTRLPORT_DATA_W*tk_i+:CTRLPORT_DATA_W]),
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.time_increment (radio_spc),
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.sample_rx_stb (sample_rx_stb),
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.sample_rx_stb (sample_rx_stb[tk_i]),
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.pps (pps_radioclk[tk_i]),
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.tb_timestamp (radio_time[64*tk_i+:64]),
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.tb_timestamp_last_pps (),
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.tb_period_ns_q32 ()
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.tb_period_ns_q32 (),
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.tb_changed ()
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);
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end
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endgenerate
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@@ -428,10 +429,13 @@ module x4xx_core_common #(
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) ctrlport_timer_i (
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.clk (radio_clk[db_i]),
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.rst (radio_rst[db_i]),
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`ifdef X410
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`ifdef X440
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.time_now (radio_time[64*db_i+:64]),
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.time_now_stb (sample_rx_stb[db_i]),
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`else
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.time_now (radio_time),
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`endif
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.time_now_stb (sample_rx_stb),
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`endif
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.time_ignore_bits (time_ignore_bits),
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.s_ctrlport_req_wr (s_radio_ctrlport_req_wr [ 1*db_i+: 1]),
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.s_ctrlport_req_rd (s_radio_ctrlport_req_rd [ 1*db_i+: 1]),
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@@ -553,7 +557,8 @@ module x4xx_core_common #(
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end
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x4xx_gpio_atr #(
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.REG_SIZE (RADIO_GPIO_ATR_REGS_SIZE)
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.REG_SIZE (RADIO_GPIO_ATR_REGS_SIZE),
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.NUM_CH_PER_DB (NUM_CH_PER_DB)
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) x4xx_gpio_atr_i (
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.ctrlport_clk (radio_clk[db_i]),
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.ctrlport_rst (radio_rst[db_i]),
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