fpga: Add X440/FBX support

Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Wade Fife <wade.fife@ni.com>
Co-authored-by: Ryan Marlow <ryan@lmarlow.com>


Original-commit: 596760a12e4834e47589c12f8a4fd083aa2f7c25

top/x400/x4xx_core.v

@@ -605,8 +605,15 @@ module x4xx_core #(
     .chdr_aclk                      (rfnoc_chdr_clk),
     .ctrl_aclk                      (rfnoc_ctrl_clk),
     .core_arst                      (rfnoc_ctrl_rst),
+  `ifdef X440
+    .radio0_clk                     (radio_clk[0]),
+    .radio0_2x_clk                  (radio_clk_2x[0]),
+    .radio1_clk                     (radio_clk[1]),
+    .radio1_2x_clk                  (radio_clk_2x[1]),
+  `else
     .radio_clk                      (radio_clk[0]),
     .radio_2x_clk                   (radio_clk_2x[0]),
+  `endif
     .dram_clk                       (dram_clk),
     .device_id                      (device_id),
     .m_ctrlport_radio0_req_wr       (ctrlport_radio_req_wr      [0* 1+: 1]),
@@ -641,7 +648,12 @@ module x4xx_core #(
     .radio_tx_stb_radio0            ({       tx_stb0}),
     .radio_tx_data_radio0           ({      tx_data0}),
     .radio_tx_running_radio0        ({   tx_running0}),
+  `ifdef X440
+    .radio_time0                    (radio_time[0*64+:64]),
+    .radio_time1                    (radio_time[1*64+:64]),
+  `else
     .radio_time                     (radio_time[0*64+:64]),
+  `endif
     .axi_rst                        (dram_rst),
     .m_axi_awid                     (dram_axi_awid),
     .m_axi_awaddr                   (dram_axi_awaddr),