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fpga: Add X440/FBX support

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Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Wade Fife <wade.fife@ni.com>
Co-authored-by: Ryan Marlow <ryan@lmarlow.com>


Original-commit: 596760a12e4834e47589c12f8a4fd083aa2f7c25
This commit is contained in:
Javier Valenzuela
2023-06-12 10:27:29 -05:00
committed by Aki Tomita
co-authored by Martin Braun Wade Fife Ryan Marlow
parent a405111ce7
commit 5cadf901c7
121 changed files with 20670 additions and 8739 deletions
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top/x400/ip/ddr4_64bits_x440/Makefile.inc
+21
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#
# Copyright 2022 Ettus Research, a National Instruments Brand
#
# SPDX-License-Identifier: LGPL-3.0-or-later
#
include $(TOOLS_DIR)/make/viv_ip_builder.mak
IP_DDR4_64BITS_X440_SRCS = \
$(IP_BUILD_DIR)/ddr4_64bits_x440/ddr4_64bits_x440.xci
IP_DDR4_64BITS_X440_OUTS = $(addprefix $(IP_BUILD_DIR)/ddr4_64bits_x440/, \
ddr4_64bits_x440.xci.out \
)
.INTERMEDIATE: IP_DDR4_64BITS_X440_TRGT
$(IP_DDR4_64BITS_X440_SRCS) $(IP_DDR4_64BITS_X440_OUTS): IP_DDR4_64BITS_X440_TRGT
@:
IP_DDR4_64BITS_X440_TRGT: $(IP_DIR)/ddr4_64bits_x440/ddr4_64bits_x440.xci
$(call BUILD_VIVADO_IP,ddr4_64bits_x440,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),0)