fpga: Add X440/FBX support

Co-authored-by: Martin Braun <martin.braun@ettus.com> Co-authored-by: Wade Fife <wade.fife@ni.com> Co-authored-by: Ryan Marlow <ryan@lmarlow.com> Original-commit: 596760a12e4834e47589c12f8a4fd083aa2f7c25
2023-06-12 10:27:29 -05:00
parent a405111ce7
commit 5cadf901c7
121 changed files with 20670 additions and 8739 deletions
@@ -0,0 +1,38 @@
+#
+# Copyright 2022 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+
+include $(TOOLS_DIR)/make/viv_ip_builder.mak
+
+IP_ADC_FULL_ORIG_SRCS = $(addprefix $(IP_DIR)/adc_full_bd/, \
+adc_full_bd.tcl \
+)
+
+IP_ADC_FULL_HDL_SRCS = $(addprefix $(BASE_DIR)/x400/rf/, \
+common/adc_iq_repacker.v \
+)
+
+IP_ADC_FULL_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/adc_full_bd/, \
+adc_full_bd.tcl \
+)
+
+IP_ADC_FULL_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/adc_full_bd/, \
+adc_full_bd/adc_full_bd.bd \
+)
+
+BD_ADC_FULL_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/adc_full_bd/, \
+adc_full_bd.bd.out \
+adc_full_bd/adc_full_bd_ooc.xdc \
+adc_full_bd/synth/adc_full_bd.v \
+)
+
+EMPTY_IP_SRCS =
+
+.INTERMEDIATE: IP_ADC_FULL_BD_TRGT
+$(IP_ADC_FULL_BD_SRCS) $(BD_ADC_FULL_BD_OUTS) $(IP_ADC_FULL_BDTCL_SRCS): IP_ADC_FULL_BD_TRGT
+	@:
+
+IP_ADC_FULL_BD_TRGT: $(IP_ADC_FULL_ORIG_SRCS) $(IP_ADC_FULL_HDL_SRCS)
+	$(call BUILD_VIVADO_BDTCL,adc_full_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(EMPTY_IP_SRCS),$(IP_ADC_FULL_HDL_SRCS),)