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fpga: Add X440/FBX support

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Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Wade Fife <wade.fife@ni.com>
Co-authored-by: Ryan Marlow <ryan@lmarlow.com>


Original-commit: 596760a12e4834e47589c12f8a4fd083aa2f7c25
This commit is contained in:
Javier Valenzuela
2023-06-12 10:27:29 -05:00
committed by Aki Tomita
co-authored by Martin Braun Wade Fife Ryan Marlow
parent a405111ce7
commit 5cadf901c7
121 changed files with 20670 additions and 8739 deletions
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top/x400/dboards/fbx/regmap/clock_en_regmap_utils.vh
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//
// Copyright 2022 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: clock_en_regmap_utils.vh
// Description:
// The constants in this file are autogenerated by XmlParse.
//===============================================================================
// A numerically ordered list of registers and their HDL source files
//===============================================================================
// CLK_EN_CONTROL : 0x0 (clock_en_control.v)
//===============================================================================
// RegTypes
//===============================================================================
//===============================================================================
// Register Group CLOCK_EN_REGISTERS
//===============================================================================
// CLK_EN_CONTROL Register (from clock_en_control.v)
localparam CLK_EN_CONTROL = 'h0; // Register Offset
localparam CLK_EN_CONTROL_SIZE = 32; // register width in bits
localparam CLK_EN_CONTROL_MASK = 32'h1;
localparam CLK_EN_SIZE = 1; //CLK_EN_CONTROL:CLK_EN
localparam CLK_EN_MSB = 0; //CLK_EN_CONTROL:CLK_EN
localparam CLK_EN = 0; //CLK_EN_CONTROL:CLK_EN
top/x400/dboards/fbx/regmap/fbx_ctrl_regmap_utils.vh
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//
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: fbx_ctrl_regmap_utils.vh
// Description:
// The constants in this file are autogenerated by XmlParse.
//===============================================================================
// A numerically ordered list of registers and their HDL source files
//===============================================================================
// RF_ATR_REGS : 0x0 (db_gpio_interface.v)
// RF_SYNC_REGS : 0x2000 (db_gpio_interface.v)
// LED_ATR_REGS : 0x4000 (db_gpio_interface.v)
// SYNC_CLK_EN_REGS : 0x6000 (db_gpio_interface.v)
//===============================================================================
// RegTypes
//===============================================================================
//===============================================================================
// Register Group FBX_CONTROLS
//===============================================================================
// RF_ATR_REGS Window (from db_gpio_interface.v)
localparam RF_ATR_REGS = 'h0; // Window Offset
localparam RF_ATR_REGS_SIZE = 'h2000; // size in bytes
// RF_SYNC_REGS Window (from db_gpio_interface.v)
localparam RF_SYNC_REGS = 'h2000; // Window Offset
localparam RF_SYNC_REGS_SIZE = 'h2000; // size in bytes
// LED_ATR_REGS Window (from db_gpio_interface.v)
localparam LED_ATR_REGS = 'h4000; // Window Offset
localparam LED_ATR_REGS_SIZE = 'h2000; // size in bytes
// SYNC_CLK_EN_REGS Window (from db_gpio_interface.v)
localparam SYNC_CLK_EN_REGS = 'h6000; // Window Offset
localparam SYNC_CLK_EN_REGS_SIZE = 'h2000; // size in bytes
top/x400/dboards/fbx/regmap/led_atr_regmap_utils.vh
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//
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: led_atr_regmap_utils.vh
// Description:
// The constants in this file are autogenerated by XmlParse.
//===============================================================================
// A numerically ordered list of registers and their HDL source files
//===============================================================================
// LED0_ATR_STATE : 0x0 (led_atr_control.v)
// LED1_ATR_STATE : 0x400 (led_atr_control.v)
// LED2_ATR_STATE : 0x800 (led_atr_control.v)
// LED3_ATR_STATE : 0xC00 (led_atr_control.v)
// LED_ATR_OPTION_REGISTER : 0x1000 (led_atr_control.v)
// LED_ATR_DISABLED : 0x1004 (led_atr_control.v)
//===============================================================================
// RegTypes
//===============================================================================
// LED_ATR_STATE Type (from led_atr_control.v)
localparam LED_ATR_STATE_SIZE = 32;
localparam LED_ATR_STATE_MASK = 32'h7;
localparam RX2_LED_SIZE = 1; //LED_ATR_STATE:RX2_LED
localparam RX2_LED_MSB = 0; //LED_ATR_STATE:RX2_LED
localparam RX2_LED = 0; //LED_ATR_STATE:RX2_LED
localparam TXRX_RED_LED_SIZE = 1; //LED_ATR_STATE:TXRX_RED_LED
localparam TXRX_RED_LED_MSB = 1; //LED_ATR_STATE:TXRX_RED_LED
localparam TXRX_RED_LED = 1; //LED_ATR_STATE:TXRX_RED_LED
localparam TXRX_GR_LED_SIZE = 1; //LED_ATR_STATE:TXRX_GR_LED
localparam TXRX_GR_LED_MSB = 2; //LED_ATR_STATE:TXRX_GR_LED
localparam TXRX_GR_LED = 2; //LED_ATR_STATE:TXRX_GR_LED
//===============================================================================
// Register Group LED_ATR_REGISTERS
//===============================================================================
// Enumerated type LED_SIZE_TYPE
localparam LED_SIZE_TYPE_SIZE = 1;
localparam LED_SIZE = 'h3; // LED_SIZE_TYPE:LED_SIZE
// LED0_ATR_STATE Register (from led_atr_control.v)
localparam LED0_ATR_STATE_COUNT = 256; // Number of elements in array
// LED1_ATR_STATE Register (from led_atr_control.v)
localparam LED1_ATR_STATE_COUNT = 256; // Number of elements in array
// LED2_ATR_STATE Register (from led_atr_control.v)
localparam LED2_ATR_STATE_COUNT = 256; // Number of elements in array
// LED3_ATR_STATE Register (from led_atr_control.v)
localparam LED3_ATR_STATE_COUNT = 256; // Number of elements in array
// LED_ATR_OPTION_REGISTER Register (from led_atr_control.v)
localparam LED_ATR_OPTION_REGISTER = 'h1000; // Register Offset
localparam LED_ATR_OPTION_REGISTER_SIZE = 32; // register width in bits
localparam LED_ATR_OPTION_REGISTER_MASK = 32'hF;
localparam LED0_ATR_OPTION_SIZE = 1; //LED_ATR_OPTION_REGISTER:LED0_ATR_OPTION
localparam LED0_ATR_OPTION_MSB = 0; //LED_ATR_OPTION_REGISTER:LED0_ATR_OPTION
localparam LED0_ATR_OPTION = 0; //LED_ATR_OPTION_REGISTER:LED0_ATR_OPTION
localparam LED1_ATR_OPTION_SIZE = 1; //LED_ATR_OPTION_REGISTER:LED1_ATR_OPTION
localparam LED1_ATR_OPTION_MSB = 1; //LED_ATR_OPTION_REGISTER:LED1_ATR_OPTION
localparam LED1_ATR_OPTION = 1; //LED_ATR_OPTION_REGISTER:LED1_ATR_OPTION
localparam LED2_ATR_OPTION_SIZE = 1; //LED_ATR_OPTION_REGISTER:LED2_ATR_OPTION
localparam LED2_ATR_OPTION_MSB = 2; //LED_ATR_OPTION_REGISTER:LED2_ATR_OPTION
localparam LED2_ATR_OPTION = 2; //LED_ATR_OPTION_REGISTER:LED2_ATR_OPTION
localparam LED3_ATR_OPTION_SIZE = 1; //LED_ATR_OPTION_REGISTER:LED3_ATR_OPTION
localparam LED3_ATR_OPTION_MSB = 3; //LED_ATR_OPTION_REGISTER:LED3_ATR_OPTION
localparam LED3_ATR_OPTION = 3; //LED_ATR_OPTION_REGISTER:LED3_ATR_OPTION
// LED_ATR_DISABLED Register (from led_atr_control.v)
localparam LED_ATR_DISABLED = 'h1004; // Register Offset
localparam LED_ATR_DISABLED_SIZE = 32; // register width in bits
localparam LED_ATR_DISABLED_MASK = 32'hF;
localparam LED0_ATR_DISABLED_SIZE = 1; //LED_ATR_DISABLED:LED0_ATR_DISABLED
localparam LED0_ATR_DISABLED_MSB = 0; //LED_ATR_DISABLED:LED0_ATR_DISABLED
localparam LED0_ATR_DISABLED = 0; //LED_ATR_DISABLED:LED0_ATR_DISABLED
localparam LED1_ATR_DISABLED_SIZE = 1; //LED_ATR_DISABLED:LED1_ATR_DISABLED
localparam LED1_ATR_DISABLED_MSB = 1; //LED_ATR_DISABLED:LED1_ATR_DISABLED
localparam LED1_ATR_DISABLED = 1; //LED_ATR_DISABLED:LED1_ATR_DISABLED
localparam LED2_ATR_DISABLED_SIZE = 1; //LED_ATR_DISABLED:LED2_ATR_DISABLED
localparam LED2_ATR_DISABLED_MSB = 2; //LED_ATR_DISABLED:LED2_ATR_DISABLED
localparam LED2_ATR_DISABLED = 2; //LED_ATR_DISABLED:LED2_ATR_DISABLED
localparam LED3_ATR_DISABLED_SIZE = 1; //LED_ATR_DISABLED:LED3_ATR_DISABLED
localparam LED3_ATR_DISABLED_MSB = 3; //LED_ATR_DISABLED:LED3_ATR_DISABLED
localparam LED3_ATR_DISABLED = 3; //LED_ATR_DISABLED:LED3_ATR_DISABLED
// Return the offset of an element of register array LED0_ATR_STATE
function integer LED0_ATR_STATE (input integer i);
LED0_ATR_STATE = (i * 'h4) + 'h0;
endfunction
// Return the offset of an element of register array LED1_ATR_STATE
function integer LED1_ATR_STATE (input integer i);
LED1_ATR_STATE = (i * 'h4) + 'h400;
endfunction
// Return the offset of an element of register array LED2_ATR_STATE
function integer LED2_ATR_STATE (input integer i);
LED2_ATR_STATE = (i * 'h4) + 'h800;
endfunction
// Return the offset of an element of register array LED3_ATR_STATE
function integer LED3_ATR_STATE (input integer i);
LED3_ATR_STATE = (i * 'h4) + 'hC00;
endfunction
top/x400/dboards/fbx/regmap/rf_atr_regmap_utils.vh
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//
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: rf_atr_regmap_utils.vh
// Description:
// The constants in this file are autogenerated by XmlParse.
//===============================================================================
// A numerically ordered list of registers and their HDL source files
//===============================================================================
// RF0_ATR_STATE : 0x0 (rf_atr_control.v)
// RF1_ATR_STATE : 0x400 (rf_atr_control.v)
// RF2_ATR_STATE : 0x800 (rf_atr_control.v)
// RF3_ATR_STATE : 0xC00 (rf_atr_control.v)
// ATR_OPTION_REGISTER : 0x1000 (rf_atr_control.v)
// RF_ATR_DISABLED : 0x1004 (rf_atr_control.v)
//===============================================================================
// RegTypes
//===============================================================================
// RF_ATR_STATE Type (from rf_atr_control.v)
localparam RF_ATR_STATE_SIZE = 32;
localparam RF_ATR_STATE_MASK = 32'h7;
localparam TX_RX_RFS_SIZE = 1; //RF_ATR_STATE:TX_RX_RFS
localparam TX_RX_RFS_MSB = 0; //RF_ATR_STATE:TX_RX_RFS
localparam TX_RX_RFS = 0; //RF_ATR_STATE:TX_RX_RFS
localparam RX_RFS_SIZE = 1; //RF_ATR_STATE:RX_RFS
localparam RX_RFS_MSB = 1; //RF_ATR_STATE:RX_RFS
localparam RX_RFS = 1; //RF_ATR_STATE:RX_RFS
localparam TDDS_SIZE = 1; //RF_ATR_STATE:TDDS
localparam TDDS_MSB = 2; //RF_ATR_STATE:TDDS
localparam TDDS = 2; //RF_ATR_STATE:TDDS
//===============================================================================
// Register Group RF_ATR_REGISTERS
//===============================================================================
// Enumerated type RF_SWITCHES_SIZE_TYPE
localparam RF_SWITCHES_SIZE_TYPE_SIZE = 1;
localparam RFS_SIZE = 'h3; // RF_SWITCHES_SIZE_TYPE:RFS_SIZE
// RF0_ATR_STATE Register (from rf_atr_control.v)
localparam RF0_ATR_STATE_COUNT = 256; // Number of elements in array
// RF1_ATR_STATE Register (from rf_atr_control.v)
localparam RF1_ATR_STATE_COUNT = 256; // Number of elements in array
// RF2_ATR_STATE Register (from rf_atr_control.v)
localparam RF2_ATR_STATE_COUNT = 256; // Number of elements in array
// RF3_ATR_STATE Register (from rf_atr_control.v)
localparam RF3_ATR_STATE_COUNT = 256; // Number of elements in array
// ATR_OPTION_REGISTER Register (from rf_atr_control.v)
localparam ATR_OPTION_REGISTER = 'h1000; // Register Offset
localparam ATR_OPTION_REGISTER_SIZE = 32; // register width in bits
localparam ATR_OPTION_REGISTER_MASK = 32'hF;
localparam RF0_ATR_OPTION_SIZE = 1; //ATR_OPTION_REGISTER:RF0_ATR_OPTION
localparam RF0_ATR_OPTION_MSB = 0; //ATR_OPTION_REGISTER:RF0_ATR_OPTION
localparam RF0_ATR_OPTION = 0; //ATR_OPTION_REGISTER:RF0_ATR_OPTION
localparam RF1_ATR_OPTION_SIZE = 1; //ATR_OPTION_REGISTER:RF1_ATR_OPTION
localparam RF1_ATR_OPTION_MSB = 1; //ATR_OPTION_REGISTER:RF1_ATR_OPTION
localparam RF1_ATR_OPTION = 1; //ATR_OPTION_REGISTER:RF1_ATR_OPTION
localparam RF2_ATR_OPTION_SIZE = 1; //ATR_OPTION_REGISTER:RF2_ATR_OPTION
localparam RF2_ATR_OPTION_MSB = 2; //ATR_OPTION_REGISTER:RF2_ATR_OPTION
localparam RF2_ATR_OPTION = 2; //ATR_OPTION_REGISTER:RF2_ATR_OPTION
localparam RF3_ATR_OPTION_SIZE = 1; //ATR_OPTION_REGISTER:RF3_ATR_OPTION
localparam RF3_ATR_OPTION_MSB = 3; //ATR_OPTION_REGISTER:RF3_ATR_OPTION
localparam RF3_ATR_OPTION = 3; //ATR_OPTION_REGISTER:RF3_ATR_OPTION
// RF_ATR_DISABLED Register (from rf_atr_control.v)
localparam RF_ATR_DISABLED = 'h1004; // Register Offset
localparam RF_ATR_DISABLED_SIZE = 32; // register width in bits
localparam RF_ATR_DISABLED_MASK = 32'hF;
localparam RF0_ATR_DISABLED_SIZE = 1; //RF_ATR_DISABLED:RF0_ATR_DISABLED
localparam RF0_ATR_DISABLED_MSB = 0; //RF_ATR_DISABLED:RF0_ATR_DISABLED
localparam RF0_ATR_DISABLED = 0; //RF_ATR_DISABLED:RF0_ATR_DISABLED
localparam RF1_ATR_DISABLED_SIZE = 1; //RF_ATR_DISABLED:RF1_ATR_DISABLED
localparam RF1_ATR_DISABLED_MSB = 1; //RF_ATR_DISABLED:RF1_ATR_DISABLED
localparam RF1_ATR_DISABLED = 1; //RF_ATR_DISABLED:RF1_ATR_DISABLED
localparam RF2_ATR_DISABLED_SIZE = 1; //RF_ATR_DISABLED:RF2_ATR_DISABLED
localparam RF2_ATR_DISABLED_MSB = 2; //RF_ATR_DISABLED:RF2_ATR_DISABLED
localparam RF2_ATR_DISABLED = 2; //RF_ATR_DISABLED:RF2_ATR_DISABLED
localparam RF3_ATR_DISABLED_SIZE = 1; //RF_ATR_DISABLED:RF3_ATR_DISABLED
localparam RF3_ATR_DISABLED_MSB = 3; //RF_ATR_DISABLED:RF3_ATR_DISABLED
localparam RF3_ATR_DISABLED = 3; //RF_ATR_DISABLED:RF3_ATR_DISABLED
// Return the offset of an element of register array RF0_ATR_STATE
function integer RF0_ATR_STATE (input integer i);
RF0_ATR_STATE = (i * 'h4) + 'h0;
endfunction
// Return the offset of an element of register array RF1_ATR_STATE
function integer RF1_ATR_STATE (input integer i);
RF1_ATR_STATE = (i * 'h4) + 'h400;
endfunction
// Return the offset of an element of register array RF2_ATR_STATE
function integer RF2_ATR_STATE (input integer i);
RF2_ATR_STATE = (i * 'h4) + 'h800;
endfunction
// Return the offset of an element of register array RF3_ATR_STATE
function integer RF3_ATR_STATE (input integer i);
RF3_ATR_STATE = (i * 'h4) + 'hC00;
endfunction
top/x400/dboards/fbx/regmap/rf_sync_regmap_utils.vh
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//
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: rf_sync_regmap_utils.vh
// Description:
// The constants in this file are autogenerated by XmlParse.
//===============================================================================
// A numerically ordered list of registers and their HDL source files
//===============================================================================
// SYNC_1_REG : 0x0 (ctrlport_to_i2c_sync_ctrl.v)
// SYNC_2_REG : 0x4 (ctrlport_to_i2c_sync_ctrl.v)
// SYNC_3_REG : 0x8 (ctrlport_to_i2c_sync_ctrl.v)
// SYNC_4_REG : 0xC (ctrlport_to_i2c_sync_ctrl.v)
// SYNC_5_REG : 0x10 (ctrlport_to_i2c_sync_ctrl.v)
// RFS_EN_REG : 0x14 (ctrlport_to_i2c_sync_ctrl.v)
// SETUP_REG/SETUP_STATUS_REG : 0x18 (ctrlport_to_i2c_sync_ctrl.v, ctrlport_to_i2c_sync_ctrl.v)
// CONFIG_IO_REG/CONFIG_IO_STATUS_REG : 0x1C (ctrlport_to_i2c_sync_ctrl.v, ctrlport_to_i2c_sync_ctrl.v)
//===============================================================================
// RegTypes
//===============================================================================
// SYNC_SWITCH Type (from ctrlport_to_i2c_sync_ctrl.v)
localparam SYNC_SWITCH_SIZE = 32;
localparam SYNC_SWITCH_MASK = 32'h7;
localparam CONTROL_PIN_V1_SIZE = 1; //SYNC_SWITCH:CONTROL_PIN_V1
localparam CONTROL_PIN_V1_MSB = 0; //SYNC_SWITCH:CONTROL_PIN_V1
localparam CONTROL_PIN_V1 = 0; //SYNC_SWITCH:CONTROL_PIN_V1
localparam CONTROL_PIN_V2_SIZE = 1; //SYNC_SWITCH:CONTROL_PIN_V2
localparam CONTROL_PIN_V2_MSB = 1; //SYNC_SWITCH:CONTROL_PIN_V2
localparam CONTROL_PIN_V2 = 1; //SYNC_SWITCH:CONTROL_PIN_V2
localparam CONTROL_PIN_V3_SIZE = 1; //SYNC_SWITCH:CONTROL_PIN_V3
localparam CONTROL_PIN_V3_MSB = 2; //SYNC_SWITCH:CONTROL_PIN_V3
localparam CONTROL_PIN_V3 = 2; //SYNC_SWITCH:CONTROL_PIN_V3
//===============================================================================
// Register Group RF_SYNC_REGISTERS
//===============================================================================
// Enumerated type IO_EXPANDER_REGISTER_ADRS
localparam IO_EXPANDER_REGISTER_ADRS_SIZE = 8;
localparam IO_EXP_INPUT_PORT0_REG = 'h0; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_INPUT_PORT0_REG
localparam IO_EXP_INPUT_PORT1_REG = 'h1; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_INPUT_PORT1_REG
localparam IO_EXP_OUTPUT_PORT0_REG = 'h2; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_OUTPUT_PORT0_REG
localparam IO_EXP_OUTPUT_PORT1_REG = 'h3; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_OUTPUT_PORT1_REG
localparam IO_EXP_POLARITY_INV0_REG = 'h4; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_POLARITY_INV0_REG
localparam IO_EXP_POLARITY_INV1_REG = 'h5; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_POLARITY_INV1_REG
localparam IO_EXP_CONFIG0_REG = 'h6; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_CONFIG0_REG
localparam IO_EXP_CONFIG1_REG = 'h7; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_CONFIG1_REG
// SYNC_1_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
localparam SYNC_1_REG = 'h0; // Register Offset
localparam SYNC_1_REG_SIZE = 32; // register width in bits
// SYNC_2_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
localparam SYNC_2_REG = 'h4; // Register Offset
localparam SYNC_2_REG_SIZE = 32; // register width in bits
// SYNC_3_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
localparam SYNC_3_REG = 'h8; // Register Offset
localparam SYNC_3_REG_SIZE = 32; // register width in bits
// SYNC_4_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
localparam SYNC_4_REG = 'hC; // Register Offset
localparam SYNC_4_REG_SIZE = 32; // register width in bits
// SYNC_5_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
localparam SYNC_5_REG = 'h10; // Register Offset
localparam SYNC_5_REG_SIZE = 32; // register width in bits
// RFS_EN_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
localparam RFS_EN_REG = 'h14; // Register Offset
localparam RFS_EN_REG_SIZE = 32; // register width in bits
localparam RFS_EN_REG_MASK = 32'h1;
localparam RFS_EN_PIN_SIZE = 1; //RFS_EN_REG:RFS_EN_PIN
localparam RFS_EN_PIN_MSB = 0; //RFS_EN_REG:RFS_EN_PIN
localparam RFS_EN_PIN = 0; //RFS_EN_REG:RFS_EN_PIN
// SETUP_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
localparam SETUP_REG = 'h18; // Register Offset
localparam SETUP_REG_SIZE = 32; // register width in bits
localparam SETUP_REG_MASK = 32'h1;
localparam SETUP_TRIG_SIZE = 1; //SETUP_REG:SETUP_TRIG
localparam SETUP_TRIG_MSB = 0; //SETUP_REG:SETUP_TRIG
localparam SETUP_TRIG = 0; //SETUP_REG:SETUP_TRIG
// SETUP_STATUS_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
localparam SETUP_STATUS_REG = 'h18; // Register Offset
localparam SETUP_STATUS_REG_SIZE = 32; // register width in bits
localparam SETUP_STATUS_REG_MASK = 32'h1;
localparam SETUP_STATUS_SIZE = 1; //SETUP_STATUS_REG:SETUP_STATUS
localparam SETUP_STATUS_MSB = 0; //SETUP_STATUS_REG:SETUP_STATUS
localparam SETUP_STATUS = 0; //SETUP_STATUS_REG:SETUP_STATUS
// CONFIG_IO_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
localparam CONFIG_IO_REG = 'h1C; // Register Offset
localparam CONFIG_IO_REG_SIZE = 32; // register width in bits
localparam CONFIG_IO_REG_MASK = 32'h1;
localparam CONFIG_IO_TRIG_SIZE = 1; //CONFIG_IO_REG:CONFIG_IO_TRIG
localparam CONFIG_IO_TRIG_MSB = 0; //CONFIG_IO_REG:CONFIG_IO_TRIG
localparam CONFIG_IO_TRIG = 0; //CONFIG_IO_REG:CONFIG_IO_TRIG
// CONFIG_IO_STATUS_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
localparam CONFIG_IO_STATUS_REG = 'h1C; // Register Offset
localparam CONFIG_IO_STATUS_REG_SIZE = 32; // register width in bits
localparam CONFIG_IO_STATUS_REG_MASK = 32'h1;
localparam CONFIG_IO_STATUS_SIZE = 1; //CONFIG_IO_STATUS_REG:CONFIG_IO_STATUS
localparam CONFIG_IO_STATUS_MSB = 0; //CONFIG_IO_STATUS_REG:CONFIG_IO_STATUS
localparam CONFIG_IO_STATUS = 0; //CONFIG_IO_STATUS_REG:CONFIG_IO_STATUS