miegl/b210-k7-fpga
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

e31x: Swap out liberio for internal Ethernet

Browse Source 
Original-commit: 3f823004600472c7f4b173a0da83a3bd53968c40
This commit is contained in:
RobertWalstab
2020-07-16 10:00:12 -05:00
committed by Aaron Rossetto
parent 08c24691a9
commit 0361a8fa3b
5 changed files with 522 additions and 429 deletions
Download Patch File Download Diff File Expand all files Collapse all files
top/e31x/Makefile.e31x.inc
+2
View File
@@ -25,6 +25,7 @@ include $(LIB_DIR)/hls/Makefile.inc
include $(LIB_DIR)/control/Makefile.srcs
include $(LIB_DIR)/fifo/Makefile.srcs
include $(LIB_DIR)/axi/Makefile.srcs
include $(LIB_DIR)/xge_interface/Makefile.srcs
include $(LIB_DIR)/timing/Makefile.srcs
include $(LIB_DIR)/packet_proc/Makefile.srcs
include $(LIB_DIR)/dsp/Makefile.srcs
@@ -66,6 +67,7 @@ DESIGN_SRCS = \
$(abspath $(TOP_SRCS)) \
$(CONTROL_LIB_SRCS) \
$(IP_XCI_SRCS) \
$(XGE_INTERFACE_SRCS) \
$(PACKET_PROC_SRCS) \
$(AXI_SRCS) \
$(FIFO_SRCS) \