feb849051fec1cb355de7a5e9f44881de5c6b130
This adds a generic version of eth_internal that allows you to specify the CHDR width. Original-commit: 30b522b268aed6e7b4bc1a556e88d2a4b2fe6f77
Description
No description provided
84 MiB
Languages
Verilog
42.5%
VHDL
13%
SystemVerilog
12%
HTML
11.1%
C
9.6%
Other
11.6%