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b210-k7-fpga/top/b200/coregen/coregen.cgp
T
Ben Hilburn 29086f9001 b2xx: Updating FPGA source with recent bugfixes.
Original-commit: 4b4365a517938b365af57674a3ab1462432c2c3a
2013-12-03 10:35:35 -08:00

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SET busformat = BusFormatAngleBracketNotRipped
SET designentry = Verilog
SET device = xc6slx150
SET devicefamily = spartan6
SET flowvendor = Foundation_ISE
SET package = fgg484
SET speedgrade = -3
SET verilogsim = true
SET vhdlsim = false