Javier Valenzuela f9c1a57ddb fpga: x400: cpld: Bump copyright ...

Original-commit: 98a13add8171d20215a738d19d48925babf22689

2022-01-25 10:18:47 -07:00

export/x300/radio

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

lib

fpga: x400: Connect Radio Blocks to DIO

2022-01-25 10:18:47 -07:00

sim

fpga: sim: Add PkgComplex, PkgMath, and PkgRandom

2021-08-08 14:59:26 -05:00

tools

fpga: tools: Fix adding directories for HDL source

2022-01-13 14:33:59 -06:00

top

fpga: x400: cpld: Bump copyright

2022-01-25 10:18:47 -07:00

.gitignore

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

build.py

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

Description

No description provided

84 MiB

Languages

Verilog 42.5%

VHDL 13%

SystemVerilog 12%

HTML 11.1%

C 9.6%

Other 11.6%