19 lines
697 B
Makefile
19 lines
697 B
Makefile
#
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# Copyright 2020 Ettus Research, a National Instruments Brand
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#
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# SPDX-License-Identifier: LGPL-3.0-or-later
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#
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# Add C/C++/tcl files relative to usrp3/lib/hls/<ip> directory
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HLS_IP_ADDSUB_HLS_LIB_SRCS = $(addprefix $(HLS_IP_DIR)/addsub_hls/, \
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addsub_hls.cpp \
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addsub_hls.tcl \
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)
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# HLS output artifact points to the ip/hdl/verilog folder. The build process
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# will glob all the files in this directory, including *.dat files.
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HLS_IP_ADDSUB_HLS_OUTS = $(IP_BUILD_DIR)/addsub_hls/solution/impl/ip/hdl/verilog
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# Build with HLS
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$(HLS_IP_ADDSUB_HLS_OUTS) : $(HLS_IP_ADDSUB_HLS_LIB_SRCS)
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$(call BUILD_VIVADO_HLS_IP,addsub_hls,$(PART_ID),$(HLS_IP_ADDSUB_HLS_LIB_SRCS),$(HLS_IP_DIR),$(IP_BUILD_DIR),)
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