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Wade Fife f88b56d9cb fpga: x400: Change AXI XB for DRAM to 512-bit 
Change the width of the crossbar in the AXI Interconnect IP from
256-bit to 512-bit to match the DRAM memory controller width and to
give better performance.


Original-commit: 822cd03c8cd686f8b0554774adcbdd3803128bc2
2022-03-04 18:46:12 -06:00
export/x300/radio
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
lib
fpga: rfnoc: Fix strobe probability in radio simulator
2022-03-04 18:46:12 -06:00
sim
fpga: Remove noc_shell_regs.vh and sim_rfnoc_lib.svh
2022-01-25 14:09:15 -07:00
tools
images: Remove references to N230
2022-02-15 14:07:53 -06:00
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fpga: x400: Change AXI XB for DRAM to 512-bit
2022-03-04 18:46:12 -06:00
.gitignore
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
build.py
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
LICENSE.md
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
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