Co-authored-by: Martin Braun <martin.braun@ettus.com> Co-authored-by: Wade Fife <wade.fife@ni.com> Co-authored-by: Ryan Marlow <ryan@lmarlow.com> Original-commit: 596760a12e4834e47589c12f8a4fd083aa2f7c25
114 lines
6.0 KiB
Systemverilog
114 lines
6.0 KiB
Systemverilog
//
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// Copyright 2023 Ettus Research, A National Instruments Company
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: rf_sync_regmap_utils.vh
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// Description:
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// The constants in this file are autogenerated by XmlParse.
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//===============================================================================
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// A numerically ordered list of registers and their HDL source files
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//===============================================================================
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// SYNC_1_REG : 0x0 (ctrlport_to_i2c_sync_ctrl.v)
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// SYNC_2_REG : 0x4 (ctrlport_to_i2c_sync_ctrl.v)
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// SYNC_3_REG : 0x8 (ctrlport_to_i2c_sync_ctrl.v)
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// SYNC_4_REG : 0xC (ctrlport_to_i2c_sync_ctrl.v)
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// SYNC_5_REG : 0x10 (ctrlport_to_i2c_sync_ctrl.v)
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// RFS_EN_REG : 0x14 (ctrlport_to_i2c_sync_ctrl.v)
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// SETUP_REG/SETUP_STATUS_REG : 0x18 (ctrlport_to_i2c_sync_ctrl.v, ctrlport_to_i2c_sync_ctrl.v)
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// CONFIG_IO_REG/CONFIG_IO_STATUS_REG : 0x1C (ctrlport_to_i2c_sync_ctrl.v, ctrlport_to_i2c_sync_ctrl.v)
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//===============================================================================
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// RegTypes
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//===============================================================================
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// SYNC_SWITCH Type (from ctrlport_to_i2c_sync_ctrl.v)
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localparam SYNC_SWITCH_SIZE = 32;
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localparam SYNC_SWITCH_MASK = 32'h7;
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localparam CONTROL_PIN_V1_SIZE = 1; //SYNC_SWITCH:CONTROL_PIN_V1
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localparam CONTROL_PIN_V1_MSB = 0; //SYNC_SWITCH:CONTROL_PIN_V1
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localparam CONTROL_PIN_V1 = 0; //SYNC_SWITCH:CONTROL_PIN_V1
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localparam CONTROL_PIN_V2_SIZE = 1; //SYNC_SWITCH:CONTROL_PIN_V2
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localparam CONTROL_PIN_V2_MSB = 1; //SYNC_SWITCH:CONTROL_PIN_V2
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localparam CONTROL_PIN_V2 = 1; //SYNC_SWITCH:CONTROL_PIN_V2
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localparam CONTROL_PIN_V3_SIZE = 1; //SYNC_SWITCH:CONTROL_PIN_V3
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localparam CONTROL_PIN_V3_MSB = 2; //SYNC_SWITCH:CONTROL_PIN_V3
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localparam CONTROL_PIN_V3 = 2; //SYNC_SWITCH:CONTROL_PIN_V3
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//===============================================================================
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// Register Group RF_SYNC_REGISTERS
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//===============================================================================
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// Enumerated type IO_EXPANDER_REGISTER_ADRS
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localparam IO_EXPANDER_REGISTER_ADRS_SIZE = 8;
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localparam IO_EXP_INPUT_PORT0_REG = 'h0; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_INPUT_PORT0_REG
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localparam IO_EXP_INPUT_PORT1_REG = 'h1; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_INPUT_PORT1_REG
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localparam IO_EXP_OUTPUT_PORT0_REG = 'h2; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_OUTPUT_PORT0_REG
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localparam IO_EXP_OUTPUT_PORT1_REG = 'h3; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_OUTPUT_PORT1_REG
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localparam IO_EXP_POLARITY_INV0_REG = 'h4; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_POLARITY_INV0_REG
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localparam IO_EXP_POLARITY_INV1_REG = 'h5; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_POLARITY_INV1_REG
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localparam IO_EXP_CONFIG0_REG = 'h6; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_CONFIG0_REG
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localparam IO_EXP_CONFIG1_REG = 'h7; // IO_EXPANDER_REGISTER_ADRS:IO_EXP_CONFIG1_REG
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// SYNC_1_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
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localparam SYNC_1_REG = 'h0; // Register Offset
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localparam SYNC_1_REG_SIZE = 32; // register width in bits
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// SYNC_2_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
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localparam SYNC_2_REG = 'h4; // Register Offset
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localparam SYNC_2_REG_SIZE = 32; // register width in bits
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// SYNC_3_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
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localparam SYNC_3_REG = 'h8; // Register Offset
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localparam SYNC_3_REG_SIZE = 32; // register width in bits
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// SYNC_4_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
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localparam SYNC_4_REG = 'hC; // Register Offset
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localparam SYNC_4_REG_SIZE = 32; // register width in bits
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// SYNC_5_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
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localparam SYNC_5_REG = 'h10; // Register Offset
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localparam SYNC_5_REG_SIZE = 32; // register width in bits
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// RFS_EN_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
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localparam RFS_EN_REG = 'h14; // Register Offset
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localparam RFS_EN_REG_SIZE = 32; // register width in bits
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localparam RFS_EN_REG_MASK = 32'h1;
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localparam RFS_EN_PIN_SIZE = 1; //RFS_EN_REG:RFS_EN_PIN
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localparam RFS_EN_PIN_MSB = 0; //RFS_EN_REG:RFS_EN_PIN
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localparam RFS_EN_PIN = 0; //RFS_EN_REG:RFS_EN_PIN
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// SETUP_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
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localparam SETUP_REG = 'h18; // Register Offset
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localparam SETUP_REG_SIZE = 32; // register width in bits
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localparam SETUP_REG_MASK = 32'h1;
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localparam SETUP_TRIG_SIZE = 1; //SETUP_REG:SETUP_TRIG
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localparam SETUP_TRIG_MSB = 0; //SETUP_REG:SETUP_TRIG
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localparam SETUP_TRIG = 0; //SETUP_REG:SETUP_TRIG
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// SETUP_STATUS_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
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localparam SETUP_STATUS_REG = 'h18; // Register Offset
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localparam SETUP_STATUS_REG_SIZE = 32; // register width in bits
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localparam SETUP_STATUS_REG_MASK = 32'h1;
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localparam SETUP_STATUS_SIZE = 1; //SETUP_STATUS_REG:SETUP_STATUS
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localparam SETUP_STATUS_MSB = 0; //SETUP_STATUS_REG:SETUP_STATUS
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localparam SETUP_STATUS = 0; //SETUP_STATUS_REG:SETUP_STATUS
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// CONFIG_IO_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
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localparam CONFIG_IO_REG = 'h1C; // Register Offset
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localparam CONFIG_IO_REG_SIZE = 32; // register width in bits
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localparam CONFIG_IO_REG_MASK = 32'h1;
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localparam CONFIG_IO_TRIG_SIZE = 1; //CONFIG_IO_REG:CONFIG_IO_TRIG
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localparam CONFIG_IO_TRIG_MSB = 0; //CONFIG_IO_REG:CONFIG_IO_TRIG
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localparam CONFIG_IO_TRIG = 0; //CONFIG_IO_REG:CONFIG_IO_TRIG
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// CONFIG_IO_STATUS_REG Register (from ctrlport_to_i2c_sync_ctrl.v)
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localparam CONFIG_IO_STATUS_REG = 'h1C; // Register Offset
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localparam CONFIG_IO_STATUS_REG_SIZE = 32; // register width in bits
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localparam CONFIG_IO_STATUS_REG_MASK = 32'h1;
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localparam CONFIG_IO_STATUS_SIZE = 1; //CONFIG_IO_STATUS_REG:CONFIG_IO_STATUS
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localparam CONFIG_IO_STATUS_MSB = 0; //CONFIG_IO_STATUS_REG:CONFIG_IO_STATUS
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localparam CONFIG_IO_STATUS = 0; //CONFIG_IO_STATUS_REG:CONFIG_IO_STATUS
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