Wade Fife
81f150213f
This replaces the legacy RFNoC FFT block with a new one of the same name that includes a superset of the original features. New features include cyclic prefix insertion or removal and FFT sizes up to 64k. Original-commit: 25fffb006755b2e91f0138eb4af3ab9e16b8690c
236 lines
8.1 KiB
Systemverilog
236 lines
8.1 KiB
Systemverilog
//
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// Copyright 2024 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: cp_removal
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//
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// Description:
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//
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// Removes the cyclic prefix from OFDM symbols. A configuration list allows
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// for queuing up multiple cyclic prefix lengths, and has an optional repeat
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// mode that causes the same list of cyclic prefixes to be reused as new
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// symbols arrive. This allows the block to execute a pattern for cases when
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// CP lengths change symbol to symbol in a repeating pattern.
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//
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// There is a two-clock bubble cycle after every symbol due to returning to
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// the idle state to load the next config, so this block must be clocked at
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// least slightly faster than the sample rate. That is:
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//
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// Clock rate > Fs * (1 + 2/(CP length + FFT Size))
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//
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// Parameters:
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//
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// DATA_W : Data/sample AXI-Stream bus width
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// USER_W : Width of TUSER on the data/sample AXI-Stream bus
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// SYM_LEN_W : Width of the maximum symbol length. The maximum
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// supported symbol length is 2**SYM_LEN_W - 1.
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// CP_LEN_W : Width of the maximum cyclic prefix length. The maximum
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// supported CP length is 2**CP_LEN_W - 1.
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// DEFAULT_CP_LEN : Default cyclic prefix length to output
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// CP_REPEAT : 1: Cyclic prefix list repeats. 0: Cyclic prefix list
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// does not repeat, and the last used prefix length will
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// be used once the list is completed.
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// MAX_LIST_LOG2 : Log base 2 of the size of the prefix length list
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// SET_TLAST : 1: Always set tlast at the end of each symbol. 0: Pass
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// through input tlast unchanged.
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//
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// Signals:
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//
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// clear_list : Clear the CP removal list
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// symbol_len : Symbol/FFT size to use for generating TLAST
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// cp_len_t* : AXI-Stream cyclic prefix length list input. Use this to
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// write prefix lengths to the list in order.
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// cp_list_occupied : Number of items in the cyclic prefix list
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// i_t* : AXI-Stream data input on which to do cyclic prefix removal
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// o_t* : AXI-Stream data output with cyclic prefix removed
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//
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`default_nettype none
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module cp_removal #(
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parameter int DATA_W = 32,
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parameter int USER_W = 1,
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parameter int CP_LEN_W = 16,
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parameter int SYM_LEN_W = 17,
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parameter int DEFAULT_CP_LEN = 0,
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parameter bit CP_REPEAT = 0,
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parameter int MAX_LIST_LOG2 = 5,
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parameter bit SET_TLAST = 1
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) (
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input wire clk,
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input wire rst,
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input wire clear_list,
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// Cyclic prefix length input port
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input wire [SYM_LEN_W-1:0] symbol_len,
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input wire [ CP_LEN_W-1:0] cp_len_tdata,
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input wire cp_len_tvalid,
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output wire cp_len_tready,
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output wire [ 15:0] cp_list_occupied,
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// Symbol data stream input
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input wire [ DATA_W-1:0] i_tdata,
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input wire [ USER_W-1:0] i_tuser,
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input wire i_tlast,
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input wire i_tvalid,
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output wire i_tready,
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// Symbol data stream output
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output wire [ DATA_W-1:0] o_tdata,
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output wire [ USER_W-1:0] o_tuser,
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output wire o_tlast,
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output wire o_tvalid,
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input wire o_tready
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);
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`include "usrp_utils.svh"
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enum logic [2:0] { S_IDLE, S_CONFIG, S_PREFIX, S_SYMBOL, S_CLEAR } state;
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logic [CP_LEN_W-1:0] fifo_in_tdata, fifo_out_tdata;
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logic fifo_in_tvalid, fifo_out_tvalid;
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logic fifo_in_tready, fifo_out_tready;
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logic fifo_clear;
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assign fifo_clear = (state == S_CLEAR);
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axi_fifo #(
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.WIDTH(CP_LEN_W),
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.SIZE (MAX_LIST_LOG2)
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) axi_fifo_config_inst (
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.clk (clk),
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.reset (rst),
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.clear (fifo_clear),
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.i_tdata (fifo_in_tdata),
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.i_tvalid(fifo_in_tvalid),
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.i_tready(fifo_in_tready),
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.o_tdata (fifo_out_tdata),
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.o_tvalid(fifo_out_tvalid),
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.o_tready(fifo_out_tready),
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.space (),
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.occupied(cp_list_occupied)
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);
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generate
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if (CP_REPEAT == 0) begin
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// No config list loopback. New configs can be written at any time.
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assign fifo_in_tdata = cp_len_tdata;
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assign fifo_in_tvalid = (state == S_CLEAR) ? 1'b0 : cp_len_tvalid;
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assign cp_len_tready = (state == S_CLEAR) ? 1'b0 : fifo_in_tready;
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assign fifo_out_tready = (state == S_CONFIG);
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end else begin
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// Config list loopback enabled. Write current config back into config
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// FIFO in the S_CONFIG state. New configs can be written in any state
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// but S_CONFIG & S_CLEAR.
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assign fifo_in_tdata = (state == S_CONFIG) ? fifo_out_tdata :
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cp_len_tdata;
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assign fifo_in_tvalid = (state == S_CONFIG) ? fifo_out_tvalid :
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(state == S_CLEAR) ? 1'b0 :
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cp_len_tvalid;
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assign cp_len_tready = (state == S_CONFIG) ? 1'b0 :
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(state == S_CLEAR) ? 1'b0 :
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fifo_in_tready;
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assign fifo_out_tready = (state == S_CONFIG);
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end
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endgenerate
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localparam COUNT_W = `MAX(SYM_LEN_W, CP_LEN_W);
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logic [ CP_LEN_W-1:0] cp_len_reg = DEFAULT_CP_LEN;
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logic [SYM_LEN_W-1:0] symbol_len_reg = '0;
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logic [ COUNT_W-1:0] count = '0;
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logic clear_fifo_hold = 1'b0;
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always @(posedge clk) begin
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// Latch FIFO clear
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if (clear_list) begin
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clear_fifo_hold <= 1'b1;
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end
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// State machine
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case (state)
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// Wait in idle state until either a configuration list clear is
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// requested or we get a new data input.
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S_IDLE : begin
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count <= 1;
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if (clear_fifo_hold) begin
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state <= S_CLEAR;
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end else if (i_tvalid) begin
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// Only update the CP length being used if there's a valid one in the
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// list. Otherwise, keep using the previous value.
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if (fifo_out_tvalid) begin
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cp_len_reg <= fifo_out_tdata;
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end
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symbol_len_reg <= symbol_len;
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state <= S_CONFIG;
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end
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end
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S_CONFIG : begin
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if (cp_len_reg > 0) begin
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state <= S_PREFIX;
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end else if (symbol_len_reg > 0) begin
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state <= S_SYMBOL;
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end else begin
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state <= S_IDLE;
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end
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end
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S_PREFIX : begin
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if (i_tvalid & i_tready) begin
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count <= count + 1;
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if (count >= cp_len_reg) begin
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count <= 1;
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if (symbol_len_reg > 0) begin
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state <= S_SYMBOL;
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end else begin
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state <= S_IDLE;
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end
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end
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end
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end
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S_SYMBOL : begin
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if (i_tvalid & i_tready) begin
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count <= count + 1;
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if (count >= symbol_len_reg) begin
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count <= 1;
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state <= S_IDLE;
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end
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end
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end
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S_CLEAR : begin
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clear_fifo_hold <= 1'b0;
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cp_len_reg <= DEFAULT_CP_LEN;
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state <= S_IDLE;
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end
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default : state <= S_IDLE;
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endcase
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if (rst) begin
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clear_fifo_hold <= 1'b0;
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cp_len_reg <= DEFAULT_CP_LEN;
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count <= 1;
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state <= S_IDLE;
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end
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end
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logic new_tlast;
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assign new_tlast = (state == S_SYMBOL) & (count >= symbol_len_reg);
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assign o_tdata = i_tdata;
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assign o_tuser = i_tuser;
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assign o_tlast = (SET_TLAST == 0) ? i_tlast : new_tlast;
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assign o_tvalid = (state == S_IDLE) ? 1'b0 :
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(state == S_PREFIX) ? 1'b0 :
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(state == S_SYMBOL) ? i_tvalid :
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(state == S_CLEAR) ? 1'b0 :
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1'b0;
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assign i_tready = (state == S_IDLE) ? 1'b0 :
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(state == S_PREFIX) ? 1'b1 :
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(state == S_SYMBOL) ? o_tready :
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(state == S_CLEAR) ? 1'b0 :
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1'b0;
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endmodule : cp_removal
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`default_nettype wire
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