32 lines
670 B
Systemverilog
32 lines
670 B
Systemverilog
//
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// Copyright 2025 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: fft_packetize_pkg
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//
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// Description:
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//
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// Package file for fft_packetize and fft_depacketize.
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//
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package fft_packetize_pkg;
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import rfnoc_chdr_utils_pkg::*;
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typedef struct packed {
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logic [CHDR_TIMESTAMP_W-1:0] timestamp;
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logic has_time;
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logic [CHDR_LENGTH_W-1:0] length;
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} burst_info_t;
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typedef struct packed {
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logic last;
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} symbol_info_t;
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localparam int BURST_INFO_W = $bits(burst_info_t);
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localparam int SYMBOL_INFO_W = $bits(symbol_info_t);
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endpackage : fft_packetize_pkg
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