miegl/b210-k7-fpga
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Wade Fife ea58284d4d fpga: e31x: Fix IP dependencies 
- Split SG1 and SG3 IP targets
- Remove non-existent "RFNOC" targets


Original-commit: 8320adbc18455a360d4bd26798d1f435701172b9
2022-08-29 07:53:32 -05:00
export/x300/radio
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
lib
fpga: sim: Update struct enum initialization
2022-08-25 13:55:30 -05:00
sim
fpga: sim: Workaround Vivado bug in ChdrIfaceBfm_tb
2022-08-25 13:55:30 -05:00
tools
fpga: tools: Fix HLS IP builder for Vivado 2021.1
2022-08-25 13:55:30 -05:00
top
fpga: e31x: Fix IP dependencies
2022-08-29 07:53:32 -05:00
.gitignore
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
build.py
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
LICENSE.md
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
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