64 lines
1.5 KiB
Plaintext
64 lines
1.5 KiB
Plaintext
The following files were generated for 'hbdec3' in directory
|
|
/home/matt/fpgadev/usrp3/top/b250/coregen_dsp/
|
|
|
|
Opens the IP Customization GUI:
|
|
Allows the user to customize or recustomize the IP instance.
|
|
|
|
* hbdec3.mif
|
|
* hbdec3_reload_order.txt
|
|
|
|
XCO file generator:
|
|
Generate an XCO file for compatibility with legacy flows.
|
|
|
|
* hbdec3.xco
|
|
|
|
Creates an implementation netlist:
|
|
Creates an implementation netlist for the IP.
|
|
|
|
* hbdec3.ngc
|
|
* hbdec3.v
|
|
* hbdec3.veo
|
|
* hbdec3COEFF_auto0_0.mif
|
|
* hbdec3COEFF_auto0_1.mif
|
|
* hbdec3COEFF_auto_HALFBAND_CENTRE0.mif
|
|
* hbdec3_reload_addrfilt_decode_rom.mif
|
|
* hbdec3filt_decode_rom.mif
|
|
|
|
Creates an HDL instantiation template:
|
|
Creates an HDL instantiation template for the IP.
|
|
|
|
* hbdec3.veo
|
|
|
|
IP Symbol Generator:
|
|
Generate an IP symbol based on the current project options'.
|
|
|
|
* hbdec3.asy
|
|
* hbdec3.mif
|
|
* hbdec3_reload_order.txt
|
|
|
|
Generate ISE metadata:
|
|
Create a metadata file for use when including this core in ISE designs
|
|
|
|
* hbdec3_xmdf.tcl
|
|
|
|
Generate ISE subproject:
|
|
Create an ISE subproject for use when including this core in ISE designs
|
|
|
|
* hbdec3.gise
|
|
* hbdec3.xise
|
|
|
|
Deliver Readme:
|
|
Readme file for the IP.
|
|
|
|
* hbdec3_readme.txt
|
|
|
|
Generate FLIST file:
|
|
Text file listing all of the output files produced when a customized core was
|
|
generated in the CORE Generator.
|
|
|
|
* hbdec3_flist.txt
|
|
|
|
Please see the Xilinx CORE Generator online help for further details on
|
|
generated files and how to use them.
|
|
|